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CS533 Winter 2007

Soft Timers : Efficient Microsecond Software Timer Support for Network Processing - Mohit Aron & Peter Druschel. CS533 Winter 2007. Motivation. Conventional timer facilities schedule events by hardware interrupts Interrupts and Context Switches are expensive

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CS533 Winter 2007

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  1. Soft Timers : Efficient Microsecond Software Timer Support for Network Processing- Mohit Aron & Peter Druschel • CS533 • Winter 2007

  2. Motivation Conventional timer facilities schedule events by hardware interrupts Interrupts and Context Switches are expensive • Not a concern if occurs on msec timescale – conventional timer interrupts for timeslicing • Have significant impact if in order of μsec – network receive interrupts in high speed network Cost of timer interrupt – 4.45μsec

  3. Soft Timers • A mechanism for scheduling fine grained events in an OS with low overhead • Trigger States – during normal operation a system frequently reaches states where an event handler can be invoked with minimum overhead • end of system call before to returning to user program • when CPU is executing in idle loop • End of page fault handler or software managed TLB miss

  4. Why Trigger states? • No saving and restoring of registers necessary • Locality of reference already disturbed • Costs no more than a function call • What happens • Soft timer facility checks for pending soft timer events & invokes associated handlers • Involves reading clock & comparing with scheduled time of earliest soft timer event • What can go wrong • Event may be delayed past its scheduled time • Maximal delay is bounded – to invoke periodic hardware interrupt

  5. Point to note – as long as a system reaches trigger states with sufficient frequency the soft timer facility can schedule events with much finer granularity than periodic hardware interrupts. • T < Actual Event Time < T + X + 1 T = measure clock resolution = 1micro sec interrupt clock resolution = 1 msec so X = 1000 and maximum delay is 1001 micro secs

  6. Applications - Network Processing • Rate based Clocking • Network Polling

  7. Rate Based Clocking • Current implementations of TCP perform self –clocking • Rate Based Clocking – is to transmit packets at a constant rate rather than in response to arrival of ACK’s • Helps achieve high utilization in networks with large BDP • 1Gbps network ,1500 byte packets requires a transmission every 12μsecs • Soft timers allow fine grained scheduling with low overhead

  8. Protocol Implementation – adaptive algorithm to smooth variations caused by probabilistic nature of soft timers • Two parameters – • target transmission rate • maximal allowable burst transmission rate • keeps track of average of actual transmission rate • When actual transmission rate < target rate interval for next transmission is adjusted according to maximum allowable burst transmission rate.

  9. Network polling • Network interfaces generate a hardware interrupt to signal packet reception or transmission • Another approach is pure polling : where the scheduler periodically calls network driver to poll network interfaces • Hybrid technique is to use interrupts under normal load and polling during network overload • Soft timers can be schedules at μsec granularity and similar to pure polling as far as locality of reference is concerned.

  10. Experimental results – Base overheadincurred • Hardware timer overhead does not scale with CPU speed. • Relative cost increases as CPU gets faster. • Base overhead imposed by on-chip timer is low • Base overhead of software timers is negligible – overhead of procedure call on-chip timer off-chip timer

  11. Experimental results

  12. Experimental results • System calls and IP packet transmissions are most important sources in this workload. • Most practical programs frequently make system calls, suffer page faults or general exceptions that causes system to reach trigger state.

  13. Experimental results – Network Polling

  14. Conclusion • Soft timers allow system to efficiently schedule events at granularity of μsecs. • Event granularity increases linearly with CPU speed & network speed. • Can be integrated with on-chip hardware to provide fine-grained events with tight deadlines at very low overhead.

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