'Trigger matching' presentation slideshows

JLab High Resolution TDC

JLab High Resolution TDC. Hall D Electronics Review (7/03) - Ed Jastrzembski. Data Acquisition Fast Electronics D. Abbott F. Barbosa E. Jastrzembski C. Cuevas J. Proffitt J. Wilson. History.

345 views • 27 slides

JLab High Resolution TDC

JLab High Resolution TDC. Hall D Electronics Review (7/03) - Ed Jastrzembski. Data Acquisition Fast Electronics D. Abbott F. Barbosa E. Jastrzembski C. Cuevas J. Proffitt J. Wilson. History.

385 views • 27 slides

The 10-ps TDC implemented in an FPGA

The 10-ps TDC implemented in an FPGA. Jinhong Wang, Shubin Liu, and Qi An FELab@USTC. Outline. Implementation of FPGA TDC @ USTC Timing Performance of FPGA TDC TDC Modules @ USTC. The Principle of the FPGA TDC. Coarse Counter ( Coarse Time ) + Time Interpolation within

830 views • 14 slides

VEPIX53: Current status of the DUT

201 views • 8 slides