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Timepix2 - PowerPoint PPT Presentation

Timepix2 as a prototype for VELOpix

Timepix2 as a prototype for VELOpix. X. Llopart 5 May 2010. Limitations of the Timepix chip. Chip architecture originally designed for imaging is used for single (or sparse multiple) event readout Non triggerable Full frame readout only Serial readout (100 MHz): ~100 fps

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Timepix2 - PowerPoint PPT Presentation

Timepix2 as a prototype for VELOpix