'Large designs' presentation slideshows

130nm and 90nm ASIC Technologies for SLHC applications at CERN

1.52k views • 93 slides

Selfish Designs: What Computer Designs Need from the Economy and How They Get It

913 views • 63 slides

Testbench Organization and Design

Testbench Organization and Design. Simulation Technology. Testbenches are discarded once the design is verified ? the structure of testbenches are often at the mercy of verification engineers. ? frequently generate wrong stimuli, compare with wrong results, miss corner cases.

621 views • 44 slides

Robust Window-based Multi-node Technology-Independent Logic Minimization

Robust Window-based Multi-node Technology-Independent Logic Minimization. Jeff L.Cobb W Kanupriya Gulati D Sunil P. Khatri D. W Texas Instruments, Inc. D Dept. of ECE, Texas A&M University. Overview Introduction Background Previous work Approach Experimental results Conclusions.

506 views • 39 slides

Swerve: Semester in Review

Swerve: Semester in Review. Topics. Symbolic pointer analysis Model checking C programs Abstract counterexamples Symbolic simulation and execution Cousot: the Galois connection. Pointer Analysis (in 2001). P.A. Terminology. Context-sensitivity: do we take calling context into account

366 views • 26 slides

ARCHITECT LOUIS HENRY SULLIVAN

1.62k views • 13 slides

Large-Scale SRAM Variability Characterization Chip in 45nm CMOS

Large-Scale SRAM Variability Characterization Chip in 45nm CMOS. High end microprocessors continue to require larger on-die cache memory > 6 ? of statistics needed to capture the variability of large cache memories Problem: Getting statistics across large designs is $$ and difficult

230 views • 4 slides