'Coarse time' presentation slideshows

Several Topics on TDC and the Wave Union TDC implemented in FPGA

Several Topics on TDC and the Wave Union TDC implemented in FPGA. Wu, Jinyuan Fermilab LBNL, Mar. 2009. Features of FPGA TDC. Fast Turn Around: 10 - 20 min recompile time. Sufficiently Good Resolution: Delay line based: as good as 10ps. Low Cost at Small Volume:

959 views • 50 slides

A Low-Power Wave Union TDC Implemented in FPGA

A Low-Power Wave Union TDC Implemented in FPGA. Wu, Jinyuan Fermilab Yanchen Shi and Douglas Zhu Illinois Mathematics and Science Academy Sept. 2011. Performance Degrading in CPU/GPU, ASIC & FPGA. Performance. Theoretical limit of current technology. Degrading Due to Design.

434 views • 43 slides

Coincidence Module for PET

Coincidence Module for PET. Wu, Jinyuan FNAL Mar. 2009, LBNL. From Talk by Bill Mosses. Numbers. Assumption: 8 inputs/board 4 hits/input/(160 ns) Therefore the data processing throughput of the FPGA in the coincident board is: 32 hits/(160 ns) 200 M hits/s. Not too bad.

381 views • 26 slides

Kalman Filtering for Coarse Time-Stepper Based Multiscale Data Assimilation

296 views • 15 slides