'Active level' presentation slideshows

BIST for Logic and Memory Resources in Virtex-4 FPGAs

BIST for Logic and Memory Resources in Virtex-4 FPGAs Sachin Dhingra, Daniel Milton, and Charles Stroud Electrical and Computer Engineering Auburn University Outline of Presentation Overview of Virtex-4 Architecture Operational Features Built-In Self-Test Architecture BIST for PLBs

786 views • 16 slides