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TDC in ACTEL FPGA continued

TDC in ACTEL FPGA continued. Preliminary. Tom Sluijk Hans Verkooijen Albert Zwart Fabian Jansen. To be done. Increase the number of channels to 16. Connect the TDC to a GOL to get better analyzing possibilities. Tests: Linearity DNL Temperature. Test Setup. Hit Inputs. FPGA. GOL.

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96 bits - PowerPoint PPT Presentation

TDC in ACTEL FPGA continued