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< ICECS 2010>. Design of a 7-bit 1GSPS Folding-Interpolation A/D Converter with Self-Calibration Technique. Younghoon Kim, Joongwon Jun, Kyuik Cho, Daeyun Kim, Joonho Moon and Minkyu Song Department of Semiconductor Science, Dongguk University. CONTENTS. Motivation

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<ICECS 2010>

Design of a 7-bit 1GSPS Folding-Interpolation A/D Converter with Self-Calibration Technique

Younghoon Kim, Joongwon Jun, Kyuik Cho,

Daeyun Kim, Joonho Moon and Minkyu Song

Department of Semiconductor Science,

Dongguk University


CONTENTS

  • Motivation

  • Structure of ADC

  • Circuit Design

  • Measurement

  • Conclusion


I. Motivation


II. StructureofADC

  • (7bit) High speed ADC main Structure

  • F/I Structure : Low Power Consumption, Small Chip Area, and High Speed Conversion Rate


III. CircuitDesign

※ The propose design techniques ※

I. F/I structure for low power consumption and small chip area.

II. The proposed Self-calibration Circuit.


III. CircuitDesign


III. Circuit Design

We need a self-calibration for reduce offset error


III. CircuitDesign


III. CircuitDesign


III. CircuitDesign

LSB : 1.7mV

It can decide C-DAC resolution for self-calibration


III. CircuitDesign









FOM Comparison of 6,7 and 8b ADC


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