Next generation of Trigger/DAQ

1. Next generation of Trigger/DAQ Patrick Le Dû - • Where are we today? • Evolution 2005-2010 • On/off line boundaries • What next ? 2010-2020 • LC’s Triggers • Technologies • What about standards? • Technology transfer to others fields Snowmass2001 - P. Le Dû

2. General comments about Trigger/DAQ • From the Physics: NO loss • From the Detector : Deadtimeless • From the Machine : use 100% • from T/DAQ people: maximum efficiency and minimum maintenance Can we achieve the ultimate T/DAQ system ? Snowmass2001 - P. Le Dû

3. Production rate Tevatron selection scheme QCD 7MHz Coarse , dedicated data 6 Hardwired processors ( FPGA) Level 1 10 10-50 KHz RISC Processors and DSPs optimized code 4 Level 2 10 1 KHz Level 3 2 Standard PC’s Farm 10 50Hz “Off-line” code 0 10 W,Z Recorded Events - 2 10 Top 396/132ns > Sec Higgs? 4 µsec 20-100 msec - 8 - 6 - 4 - 2 0 2 10 10 10 10 10 10 Available time (sec) Snowmass2001 - P. Le Dû

4. 7.6 MHz Xing rate D0 Detector L1 Buffer Pipeline) L1 Trigger 4.2 µs Accept 10 KHz L2 Buffer & digitization Preprocessing Farm L2 L2 Global 100 µs latency Acce/rej < 1KHz 48 Input nodes 50 ms latency L3 Farm <50 Hz Mass Storage Snowmass2001 - P. Le Dû

5. LHC Multilevels Selection scheme Production rate # / sec 8 10 QCD Hardwired processors (ASIC , FPGA) 6 10 Level 1 HLT 4 Level 2 10 Standard processor farms & Networks Level 3 2 10 W,Z 0 Top 10 Recorded Events Z’ - 2 10 Higgs > Sec 25ns few µsec ~ms - 8 - 6 - 4 - 2 0 2 10 10 10 10 10 10 Available time (sec) Snowmass2001 - P. Le Dû

6. Evolution  2005-2010 • LHC (ATLAS & CMS)  Two levels trigger • L1 = physics objects ( e/g,jet,m ..) using dedicated data • L2 + L3 = High Levels « software » Triggers using « digitized data » • Complex algorithms like displaced vertices are moving downstream • CDF/DO : L2 vertex trigger • LHCb/Btev : L0/L1 b trigger • Use as much as possible comodity products (HLT) • No more « Physic » busses  VME,PCI .. • Off the shelf technology • Processor farms • Networks switches (ATM, GbE ) • Commonly OS and high level languages Snowmass2001 - P. Le Dû

7. L1 collision rate MHz “Logical Strategy” for event selection Logical steps • Local identification of • Energy cluster • Track segment • Missing energy Prompt Trigger “Identification of objects” Coarse dedicated data Few µsec > KHz Objects High Level Trigger Selection “L 1 objects “ confirm Particle signature Global Topology Trigger Menu • Refine Et and Pt cut • Detector matching • Mass calculation • VTX & Impact parameters ... Final Digitized data optimised code L2 Classification of Physics/calibration Process Few msec > Hz Event Filter On-line processing • Full or partial reconstruction • Calibration & monitoring • “Hot stream” physics • “Gold platted ”events • Final formatting etc ... Partial to full event “Off-line” code type L3 Data streams Few sec “off-line” Storage& analysis S1 S2 S3 S4 Sn Snowmass2001 - P. Le Dû

8. On-off line boundaries become flexible • Detectors are becoming more stable and less faulty • On-line processing power is increasing and use similar hw/sw components (PC farms..) • On-line calibration and correction of data possible • More complex analysis is moving on-line • Filter event • Sort data streams… Snowmass2001 - P. Le Dû

9. Trigger strategy & Event Analysis Menu • Simple signatures : • e/g , µ, taus ,Jet • Refine Et and Pt cut • Detector matching Simple signatures 5-10KHz HLT Algorithms Select « Physics tools » Complex signatures • Complex signatures : • Missing Et, scalar Et • Invariant and transverse mass • separation … • vertices, primary and displaced Others signatures 1-2 KHz HLT Reject ms Topology Select objects and compare to Menus • Selection: • Thresholding • Prescaling • “Intelligent formatting “ Event Candidate & classification 100Hz Fast Analysis Stream Partial/Full Event Building Physics streams • Monitoring • Calibration • Alignements • Physics monitoring • “Gold Platted“ events • Physics samples On-Line Processing Sec. Sec. Temporary storage Sn S1 S2 Calibration Constant Sub-Detector performance Event Background Infos to the LHC Database “Analysis” farm hours days hours days Sample Prescale Compress Candidates Storage “Garbage” Final storage Snowmass2001 - P. Le Dû

10. Summary of T/DAQ architecture evolution L1 L1 hardware • Today • Tree structure and partitions • Processing farms at very highest levels • Trigger and DAQ dataflow are merging • Near future • Data and control networks centered • Processing farm already at L2 • More complex are moving on line • Boundaries between on-line and off-line are flexible • Comodity components more towards L1 L2 HLT L3 On-line Analysis farm Off-line Pass1 Pass2 Pass2 Snowmass2001 - P. Le Dû

11. What next ? 2010-2020 • Next generation of machines • LC (Tesla,NLC,JLC) • Concept of « software trigger » • VLHC : like LHC • CLIC : < ns sec collision time! • Mu collider : Not invetigated yet! • Next generation of detectors : • Pixels trackers : ex 800 M Ch (Tesla) • Si-W calorimeters: 32 M Ch. (Tesla) • Very high luminosity > 10**34 • High or continuous collision rate (< ns) • multimillion Si read-out channels Challenges Snowmass2001 - P. Le Dû

12. LC beam structure TESLA JLC (NLC) 5 Hz 150 Hz 2820 bunches 85 bunches / // / / // / 199 ms 6.6 ms • Relatively long time between bunch trains 199 ms • Rather long time between bunches: 337 ns • Rather long bunch trains ( same order as detector rerad-out time: 1ms 1ms 238 ns • Relatively long time between bunch trains (same order as read-out time): 6.6 ms • Very short time between bunches: 2.8 ns • Rather short pulses : 238 ns Snowmass2001 - P. Le Dû

13. LC basic trigger concept : NO hardware trigger • Read-out and store front end digitized data of a complete bunch train into buffers • Deadtime free -- no data loss • DAQ triggered by every train crossing • build the event and perform zero suppression and/or data compression • full event data information of complete bunch train available • Software selection between train : software trigger • using « off-line » algorithms • Classify events according • physics, calibration and machine needs • Store events : • partial or everything! Snowmass2001 - P. Le Dû

14. Advantages • Flexible • fully programmable • unforeseen backgrounds and physics rates easily accomodated • Machine people can adjust the beam using background events • Easy maintenance and cost effective • Commodity products : Off the shelf technology (memory,switches, procsessors) • Commonly OS and high level languages • on-line computing ressources usable for « off-line » • Scalable : • modular system Snowmass2001 - P. Le Dû

15. Consequences on detector concept • Constraints on detector read-out technology • TESLA: Read 1ms continuously • VTX: digitizing during pulse to keep VTX occupancy small • TPC : no active gating • JLC/NLC : • 7 ms pulse separation • detector read out in 5 ms • veto trains • 3 ns bunch separation • off line bunch tagging • Efficient/cheap read-out of million of front end channels should be developped • silicon detectors ( VTX and SiWcalorimeters) Snowmass2001 - P. Le Dû

16. Conclusion about LC triggers • Software trigger concept remains the ‘ baseline ’ • T/DAQ for the LC is NOT an issue ! • Looks like the ‘ ultimate trigger ’ • satisfy everybody : no loss and fully programmable • Feasible - (almost) today and affordable • Less demanding than LHC • Consequence on the detector design • constraint on detectors read-out electronics (trackers) • Consequence on the sofware environment: • on and off-line are merging : need to develop a complete integrated computing model with common ressources from calibration, selection (algorithms and filter) and analysis /processing paths…. Snowmass2001 - P. Le Dû

17. Technology forecast (2005-2015)Fast logic & hardware triggering (L1) • Move to digital & programmable • ASICS not anymore developped • FPGA’s is growing and can embed complex algorithms Snowmass2001 - P. Le Dû

18. Technology forecast (2005-2015)(Software trigger) Systematic use of : Off the Shelves comodity products • Processors and memories • Continuous increasing of the computing power • More’s law still true until 2010!  x 64 • Then double every 3years  • Memory size quasi illimited ! • Today: 64 Mbytes • 2004 : 256 MB • 2010 : > 1 GB • Networks:Commercial telecom/computer standards • Multi (10-100) GBEthernet • But : Software overhead will limit the performance… x 256 by 2016 Snowmass2001 - P. Le Dû

19. About standards • Evolution of standards : no more HEP! • HEP : NIM (60s) CAMAC (70s), FASTBUS (80s), • Commercial OTS : VME (90s), PCI (2000)  CPCI? • Looking ahead: today commercial technologies • No wide parallel data buses in crates • Backplanes used for power distribution,serial I/O, special functions • High speeGb/s fiber & copper serial data links • Wireless data link emerging • Higher densities for micros,memories standards commercial part • Hundred of pin packages Snowmass2001 - P. Le Dû

20. Transfer to other fields • Last year IEEE NSS-MIC Conference shows a great interest and a common interest • Medical Imaging as similar requirement as us for diagnostic TEP • Large data movment and on-line treatment • Fast selection and reconstruction Snowmass2001 - P. Le Dû

21. Final Conclusions • Trigger/should not be an issue for the next generation of machines like LCs • Fully commercial OTS comodity components • Programmable & software triggers • On-line and Off-line boundaries become very flexible: need a new « computing model » • Challenges for 2020 • Very high luminosity > 10**34 • High or continuous collision rate (< ns) Snowmass2001 - P. Le Dû