At CERN

1. At CERN • Plus side slice test (downstairs) • YE+2 connected to gas system, flushing with Ar-CO2 • Closed system since last week, down to ~100ppm O2 • Change to working gas mixture (Ar-CO2-CF4) held off due to leak in system feeding YE+2… • Presentation on time for CSC to come up from “cold” and “warm” starts to be given at next week’s L1 trigger meeting… • Work continues to compare simulation with data from Terentiev… G. Rakness (UCLA)

2. VME/JTAG read/write registers on… TMB + ALCT (trigger primitives) DMB + CFEB (comparators, data acquisition) Configuration parameters include… Thresholds: Comparators, discriminators Number of cathode, anode layers to satisfy pattern for Local Charged Track (LCT) Delay parameters for intra- and inter-chamber LCT alignment: Cable lengths Time-of-Flight No scenarios envisaged where Run Control will change parameters for CSC Front Ends CSC Peripheral Crate and Chamber Electronics Configuration: 468 chambers G. Rakness (UCLA)

3. CSC Trigger Primitive Configuration on “user PROMs” • CSC Peripheral Crate, chamber electronics in USX55… • High radiation environment, must be ready for Single Event Upsets • CSC TPG electronics store configuration parameters on “user PROMs” • Different than PROMs from which the FPGA gets its program • Programmed by Boundary Scan remotely via VME JTAG registers • On hard reset… • FPGA loads its program from its PROMs • FPGA extracts configuration parameters from user PROMs • Ready for Resync 101msec later • While configuration parameters are loaded from user PROM, TMB computes checksum to compare with programmed value… Agreement (or not) stored in 2 TMB VME registers, and TMB header… G. Rakness (UCLA)

4. Definitions in Context for CSC TPG • “Cold” start = “Warm” start • No change of CSC configuration parameters • Time for reconfiguration (Hard Reset) = 101msec • Configuration check: • Do read values agree with expected values? • Time to check configuration values from TMB + ALCT for 468 chambers: ~3.75 min (dominated by read of ALCT thresholds) • Run Control response if “CSC Check = false” • Hard reset G. Rakness (UCLA)

5. (not to present) Time to program userPROMs and flash memories… • No broadcast functionality  Serial programming… • Recall, different cable lengths for different chambers… • Amount of time it takes to program all of the userPROMs and flash memories is~2.4 hours • (234 chambers assumes simultaneous communication to plus- and minus-end)  • Breakdown: • TMB  10% • ALCT 31% • DMB  59% G. Rakness (UCLA)

6. Simulation CSC synchronization “knobs” • Note: synchronized wires at AFEB  perfect timing at global trigger • bunchTimingOffsets[chamber type] • Shifts all chambers of a given type by a constant amount (nsec) • In CMSSW_1_6_0, all of these values are the same except for ME1/1A and ME1/1B. Is this because of the different sized gas gap for these chambers? Or wire spacing? Maybe both... • timeBitForBxZero • Global offset for all wireHits from all chambers (bx) • tofOffset • One correction per wiregroup (per chamber) (nsec) • Compensates for TOF for muons originating at z=0 • No parameters to tune, since the correction is calculated in the method CSCWireElectronicsSim?::timeOfFlightCalibration(wiregroup) • Also exists a smearing parameter to smear each AFEB wire (to smear arrival at ALCT…)Currently this is set to 0… G. Rakness (UCLA)

7. Simulation timing distributions for all AFEBs Simulate pT=10GeV/c muons coming from interaction region… Looks real good… too good…? G. Rakness (UCLA)

8. Anode front-end timing (cont’d) • 2D presentation of the anode time vs total cathode charge

9. Nikolai also has results from cosmic ray data… G. Rakness (UCLA)

10. Timing distributions • Average number of layers (hits) per time bin. • Anode hits - all 6 layers in 3 BX

11. Simulation… 500 Time bin 0 •  with pT=10GeV/c, 1.0 <  < 2.2 • Cuts: • 1 wire hit per layer • Trying to mimic Nikolai’s cuts… • Anode hits: • Select events with one anode wire hit in each layer • |Wire hit angle| <= 2 • Wire hit earliest tbin>=7 10 Time bin 1 Simulation significantly less spread than Nikolai’s cosmic ray data analysis… G. Rakness (UCLA)

12. Anode front-end timing • In most cases in the 25 ns beam test the ALCT BX one 25 ns bin efficiency was > 99% with no individual fine delay tuning done • Hits are in a compact group of a few AFEBs for SC trigger (similar cable lengths) • Delay chips in each given ALCT board have similar delay characteristics • ALCT delay was set so that ALCT BX = 2 was the most likely • In cases of the ALCT BX efficiency of ~ 95% (see Fig.) • More peripheral AFEBs involved in TF trigger • The ALCT BX one bin inefficiency is tracked down to AFEB/ALCT delay chips which need the fine delay tuning

13. To do… • Proposal to continue simulation study… • Add smearing at AFEB’s to at least model AFEB-ALCT cable lengths + delay ASIC… • Push Heavy Stable Charged Particles through simulation and see how well emulator does at creating: • CLCT • ALCT • LCTs matched at TF… • Check to see if, in this idealized case, HSCP’s will make it through the CSC trigger… G. Rakness (UCLA)

14. Timing distributions • Average number of layers (hits) per time bin. • Anode hits, the same, in 3D