Ch 2 intro to assembly language programming
This presentation is the property of its rightful owner.
Sponsored Links
1 / 41

Ch.2 Intro. To Assembly Language Programming PowerPoint PPT Presentation


  • 32 Views
  • Uploaded on
  • Presentation posted in: General

Ch.2 Intro. To Assembly Language Programming. From Introduction to Embedded Systems: Interfacing to the Freescale 9s12 by Valvano, published by CENGAGE. 2.1 Binary and Hexadecimal Numbers. Decimal numbers {0,1,2,…,7,8,9} A decimal number is a combination of digits multiplied by powers of 10

Download Presentation

Ch.2 Intro. To Assembly Language Programming

An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -

Presentation Transcript


Ch 2 intro to assembly language programming

Ch.2 Intro. To Assembly Language Programming

From Introduction to Embedded Systems: Interfacing to the Freescale 9s12 by Valvano, published by CENGAGE


2 1 binary and hexadecimal numbers

2.1 Binary and Hexadecimal Numbers

  • Decimal numbers

    • {0,1,2,…,7,8,9}

    • A decimal number is a combination of digits multiplied by powers of 10

    • 1984 = (1)x103 + (9)x102 + 8 x101 + (4)x100

  • Binary numbers

    • {0,1}

    • A binary number is a combination of binary digits multiplied by powers of 2.

    • 011010102 = %01101010

    • 0x27+1x26+1x25+0x24+1x23+0x22+2x21+2x20

    • = 0 +64 +32+0+8+2+0= 106


2 1 binary and hexadecimal numbers cont

2.1 Binary and Hexadecimal Numbers (cont.)

  • Hexadecimal numbers

    • {0,1,…9,A,B,C,D,E,F}, where A=10, …, F=15

    • A hexadecimal number is a combination of the digits {0-F} multiplied by powers of 16

    • 12AD16 = $12AD = 1x163 +2x162 +(10)x161 +(13)x160 = 4096 + 512 + 160 +13=4781

  • Fractions—use negative powers.

  • Words=16 bits on the 9s12.

  • Bytes = 8 bits on the 9s12.

  • Nibble = 4 bits.


Checkpoints

Checkpoints

  • Checkpoint 2.1 What is the numerical value of %11111111?

  • Checkpoint 2.2 What is the numerical value of $FF?

  • Checkpoint 2.3 Convert the binary number %01000101 to hexadecimal.

  • Checkpoint 2.4 Convert the binary number %110010101011 to hexadecimal.

  • Checkpoint 2.5 Convert the hex number $40 to binary

  • Checkpoint 2.6 Convert the hex number $63F to binary.

  • Checkpoint 2.7 How many binary bits does it take to represent $123456?


2 2 addresses registers and accessing memory

2.2 Addresses, Registers, and Accessing Memory

  • Figure 2.3—memory model of simplified 9S12 computer (small boxes—8 bits)

  • Address—specifies the location from where to read data to where to write data.

  • Addresses—simple linear sequences—from $0000 to $FFFF.

    • $0240 points to an I/O port (Port T)

    • $3800 points to a location in RAM

    • $F004 points to a location in EEPROM


Registers

Registers

  • Registers—high speed storage devices located in the processor.

  • Registers do not have addresses, but instead have names and numbers.

    • Register A (8 bits)

  • Program Counter (PC)—16 bits—contains the address of the instruction that is executing.


Read write operations

Read/Write Operations

  • For this text (see page 30)

    • =[U] specifies an 8-bit read from address U.

    • ={U} specifies a 16-bit read from addresses U, U+1 (most significant byte first).

    • [U]= specifies an 8-bit write to address U.

    • {U}= specifies a 16-bit write to addresses U, U+1 (most significant byte first).


Checkpoint

Checkpoint

  • Checkpoint 2.8: What does [$0240] = RegA mean literally? What is the overall action?


Registers of the 9s12

Registers of the 9S12

  • Fig. 22.4 shows the six registers (page 30 of text).

    • Accumulator—typically used to hold and manipulate numbers—RegA and RegB (8 bits each or 16 bits when combined –RegD)

    • Index Registers —RegX and RegY –16 bits each—addresses and pointers.

    • Program Counter (PC)—points to the current instruction and is 16 bits.

    • Condition Code Register (CC or CCR)—8 separate bits—S, X, H, I, N, Z, V, C—Z is set of the result is zero after an operation.


Ch 2 intro to assembly language programming

CLI

  • The I bit can be cleared using the CLI instruction during the debugging of a program.

  • More in Chapter 9.


Checkpoint1

Checkpoint

  • Checkpoint 2.9 (page 31): Think about how you could use the “subtract” and the “branch on zero” instructions to test if two numbers are equal?


Stack pointer register

Stack Pointer Register

  • The stack is temporary storage in RAM.

  • SP is a 16-bit register that points to the top of the stack.

  • Figure 2.5 illustrates the process of “pushing” on the stack (the SP is decremented and the data is written.)

  • To “pop” data, the data is read from the location specified by SP, then SP is incremented.


Memory maps

Memory Maps

  • Table 2.2—9S12C32

  • Table 2.3 9S12DPS12

  • Table 2.3 9S12E128


2 3 assembly syntax

2.3 Assembly Syntax

  • 2.3.1 Assembly Language Instructions

    • Load AccumulatorA : ldaa

      • Reads an 8-bit byte and places it into register A.

    • Assembly code fields

      • Label opcodeoperandcomment

      • Here ldaa$3800; RegA= $3800


Assembly code and machine code

Assembly Code and Machine Code

  • Assembly language instructions, assembly code, assembly source code

  • Machine instructions, machine code, and object code (can be loaded into EEPROM and executed.)

  • Example:

    • Assembly code: ldaa $3800

    • Machine code: $B6, $38, $00

  • An assembler converts the assembly language program into machine code.


2 3 2 pseudo operation codes

2.3.2 Pseudo Operation Codes

  • Pseudo-op, pseudo operation code, and assembly directives are equivalent.

  • These are used by the assembler during the assembly process and are not executed as assembly code.

  • Example:

    • org $4000 means that the machine code will be loaded into EEPROM memory starting at location $4000.


More pseudo codes

More Pseudo Codes

  • equate is used to define a symbol.

  • Reserve multiple bytes (rmb) is used to define uninitialized variables.

  • Form double byte (fdb) is used to form a 16 bit constant. The following two lines indicate where to start execution:

  • org $FFFE

  • fdb main


Checkpoint2

Consider the following:

org $8080

Ptr1rmb2

Data1 rmb1

Ptr1 is found at $8080 and $8081.

Checkpoint 2.10 Where in memory will the variable Data1 be located?

Hint: it comes after Ptr1; it is not in $8080.

Checkpoint


2 4 simplified 9s12 machine language execution

2.4 Simplified 9S12 Machine Language Execution

  • A simplified cycle-by-cycle analysis is done.

  • TExaS can simulate both the hardware devices and software action at the same time.

  • Table 2.5 (page 34) illustrates the difference between a real 9S12 and the TExaS bus cycle simulation.


Components of the 9s12

Components of the 9S12

  • See Figure 2.6 (page 34).

    • Control Unit (CU) —controls the sequence of operations.

    • Instruction Register (IR) —contains the op code of the current instruction.

    • Arithmetic Logic Unit (ALU) —performs addition, subtraction, multiplication, division, and, or, and shift.

    • Bus Interface Unit (BIU) —reads and writes data to the bus.

    • Effective Address Register (EAR) –contains data address for the current instruction –TExaS allows the EAR to be observed.

    • Bus—8 bits and 16 bits (R/W is the control).

    • Memory

    • I/O Ports


Read and write cycles

Read and Write Cycles

  • Read Cycles

    • Instruction fetch —PC points to data to be placed in the IR.

    • Operand fetch — effective address is calculated.

    • Data fetch –the address is in the EAR, and data is placed in a register or sent to the ALU,

    • Stack pull -- data is “popped” from the stack.

  • Write Cycles

    • Data write (from a register or ALU to memory location stored in the EAR)

    • Stack push


Phases of execution page 35 of text

Phases of Execution (page 35 of text)

  • Phase 1: Opcode and Operand fetch

  • Phase 2: Decode instruction

  • Phase 3: Evaluate address

  • Phase 4: Data read

  • Phase 5: Free cycles

  • Phase 6: Data write


Simple address modes

Simple Address Modes

  • Inherent Addressing

  • Immediate Addressing

  • Direct (Page) Addressing—other computers call this zero page addressing.

  • Extended Addressing—other computers call this direct addressing.

  • Indexed Addressing

  • PC Relative Addressing


Addressing modes

Addressing Modes

  • 2.5.1 Inherent Addressing Mode

    • There is no operand field.

    • Example: clra (machine code $87)

    • Figure 2.7 The data for the instruction is implied—RegA is set to zero.

  • 2.5.2 Immediate Addressing Mode

    • The data is included in the machine code.

    • Example ldaa #36 (machine code $86 $24)

    • Figure 2.8—phase 1: fetch opcode; phase 2 fetch operand.


Addressing modes1

Addressing Modes

  • 2.5.3 Direct (Page) Addressing

    • Uses an 8-bit address to access location from 0 to $00FF (some addresses are I/O ports)

    • Example: ldaa $32 (machine code: $96 $32)

    • Figure 2.9 –opcode is read; operand is read; value of Port K ($32) is $57; $57 is placed in register A.

  • 2.5.4 Extended Addressing

    • Uses a 16-bit address; allows access to all memory and I/O.

    • Example: ldaa $3800 (machine code: $B6 $38 $00

    • Figure 2.10 --opcode is read; operand is read; rest of operand is read; address is calculated and data is moved into register A.


Addressing modes2

Addressing Modes

  • 2.5.5 Indexed Addressing

    • Uses a 16-bit pointer in a register to access memory and I/O devices.

    • RegX and RegY can be used as the pointers.

    • Example: ldaa 0,x (machine code: $A6 $00)

    • Figure 2.11—opcode is fetched; operand is fetched; fetch using the EAR, the data in $3900.

  • 2.5.6 PC Relative Addressing

    • Used for the branch and branch to subroutine instructions.

    • Example: bra main (machine code $20 $F4)

    • Fig. 2.11—opcode is fetched; operand is fetched.

    • The operand field for PC relative addressing is an 8-bit value called rr.

    • rr = (destination address) – (location of instruction) – (size of the instruction).


Checkpoints1

Checkpoints

  • Checkpoint 2.12: What is the difference between ldaa #36 and ldaa #$24?

  • Checkpoint 2.13: What is the difference between ldaa #32 and ldaa $32?

  • Checkpoint 2.14: Give the machine code for the assembly code that branches to itself, causing an infinite loop, loop braloop


2 6 the assembly language development process

2.6 The Assembly Language Development Process

  • An editor is used to create the source code.

  • An assembler is used to translate the source code to machine instructions.

  • The assembler also produces a listing file, which shows the addresses and object code that corresponds to each lin of the assembly code.

  • A loader is used to place the object code into memory, when a real microcontroller is used.


2 7 memory transfer operations page 41 of text

2.7 Memory Transfer Operations (page 41 of text)

  • Symbols used

    • w—signed 8-bit (-128 to + 127) or unsigned 8-bit (0-255)

    • n -- signed 8-bit

    • u – unsigned 8-bit

    • W -- signed 16 bit (-32787 to + 32767) or unsigned 16- bit (0 to 65535)

    • N -- signed 16-bit

    • U -- unsigned 16-bit


Instructions for memory transfer page 42

Instructions for Memory Transfer(page 42)

  • Note that copies are made of the memory contents.

  • Instructions:

    • Load (memory contents are copied into a register.)

    • Move (copies of memory values are moved into other memory locations.)

    • Store (register contents are copied and moved into memory.)


Checkpoints2

Checkpoints

  • Checkpoint 2.15: What is the difference between ldx #$0801 and ldx $0801?

  • Checkpoint 2.16: What is the difference between direct mode instruction ldx<$12 and the extended mode instruction ldx>$0012?

  • Checkpoint 2.17: Write assembly code that copies the 8-bit data from memory location $0810 to memory location $0820.

  • Checkpoint 2.18: Write assembly code that writes the binary %11000111 to Port T.


2 8 subroutines

2.8 Subroutines

  • Subroutines are subprograms that may or may not return a value (text—page 43).

  • Program 2.1 (page 43) Subroutine Set

    • Command bsr is used (but jsr could also be used.)

    • Relative addressing is used with bsr and extended addressing is used with jsr.

    • At run time, the return address will be pushed on the stack, and then will be pulled when the subroutine is finished (instruction rts is used.)

    • Two global variables: Flag and Data

    • Fig. 2.13 illustrates the stack during execution.


2 9 input output

2.9 Input/Output

  • 2.9.1 Direction Registers

    • PTT—8-bit Port T—address $0240.

    • Each of the eight pins can be an input (logic levels.)

    • Fig. 2.15—illustrates the direction register DDRT.

      • If DDRT = $FF all pins are outputs.

      • If DDRT = $00 all pins are inputs.

      • If DDRT = $0F PT0-PT3 are outpus; others are inputs.


Checkpoint3

Checkpoint

  • Checkpoint 2.19: What happens if we were to set DDRT ro $F0?


Example 2 1 page 46 of text

Example 2.1 (page 46 of text)

  • Make PTT pins 7-4 input and pins 3-0 output, then make PT3-PT0 output high.

    • Set the direction register:

      • ldaa #$0F

      • staa DDRT

    • Set the outputs high

      • ldaa #$0F

      • staa PTT


2 9 2 switch interface

2.9.2 Switch Interface

  • SPST—single poll single throw

    • Figure 2.16 (page 47).

  • Mechanical switches is subject to bouncing—this can be reduced by reading the value and then waiting 10ms before reading again.


2 9 3 led interface

2.9.3 LED Interface

  • LEDs emit light when electric current passes through them.

  • The current must pass from the anode to the cathode.

  • The cathode is the short lead.

  • Figure 2.17 (page 47).

    • Suppose the desired brightness requires 1.9V.

    • R = (5 –Vd-Vol)/Id = (5-1.9-.5)/.01 = 260 ohms.

    • Vd is the desired operating voltage.

    • Vol is the ouput low voltage of the LED driver.

    • Id is the desired LED current.


Checkpoint4

Checkpoint

  • Checkpoint 2.20: What resistor value in Figure 2.17 is needed if the desired LED operating point is 1.7 V and 5 mA?


Leds cont

LEDs (cont.)

  • The driver is not needed when the LED current is much less than 10 mA.

  • Figure 2.18 (page 48) illustrates this situation for LED interfacing.

    • Positive logic interface: R = (Voh – Vd)/Id.

    • Negative logic interface: R = (5-Vd-Vol)/Id.


Checkpoint5

Checkpoint

  • Checkpoint 2.21: What resistor value in Figure 2.18 is needed if the desired LED operating point is 1.7V and 2 mA?


Example 2 2 page 48 49

Example 2.2 (page 48-49)

  • Build a system with three LEDs that flash a rotating sequence 100,010,001 over and over.

    • Use low current LEDs (cheaper and easier to interface).

    • Use PT0-PT2 as the three output pins.

    • As shown in Figure 2.18, build three positive logic LED circuits as shown in Figure 2.19.

    • Software is shown on pages 49 and 50.


  • Login