Lecture 13

1. Lecture 13 MOSFET Differential Amplifiers Microelectronic circuits

2. topics • Ideal characteristics of differential amplifier • Input differential resistance • Input common-mode resistance • Differential voltage gain • CMRR • Non-ideal characteristics of differential amplifier • Input offset voltage • Input biasing and offset current • Differential Amplifier with active load • Frequency rresponse Microelectronic circuits

3. MOS differential pair Figure 7.1 The basic MOS differential-pair configuration. Microelectronic circuits

4. Common mode operation Q1 and Q2 in saturation mode Figure 7.2 The MOS differential pair with a common-mode input voltage vCM. Microelectronic circuits

5. Exercise 7.1 Microelectronic circuits

6. Figure 7.3(Continued) Microelectronic circuits

7. Differential mode operation Figure 7.4 The MOS differential pair with a differential input signal vid applied. With vid positive: vGS1>vGS2, iD1>iD2, and vD1<vD2; thus (vD2-vD1) will be positive. With vid negative: vGS1<vGS2, iD1<iD2, and vD1>vD2; thus (vD2-vD1) will be negative. Microelectronic circuits

8. Large signal operation Figure 7.5 The MOSFET differential pair for the purpose of deriving the transfer characteristics, iD1 and iD2 versus vid=vG1 – vG2. Microelectronic circuits

9. Figure 7.6 Normalized plots of the currents in a MOSFET differential pair. Note that VOV is the overdrive voltage at which Q1 and Q2 operate when conducting drain currents equal to I/2. Microelectronic circuits

10. Figure 7.7 The linear range of operation of the MOS differential pair can be extended by operating the transistor at a higher value of VOV. Microelectronic circuits

11. Small signal operation (differential gain) Figure 7.8 Small-signal analysis of the MOS differential amplifier: (a) The circuit with a common-mode voltage applied to set the dc bias voltage at the gates and with vid applied in a complementary (or balanced) manner. (b) The circuit prepared for small-signal analysis. (c) An alternative way of looking at the small-signal operation of the circuit. Microelectronic circuits

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13. ro effects Microelectronic circuits

14. Common-mode gain et CMRR (1) The differential pair is taken single-endedly (2) The output is taken differentially Microelectronic circuits

15. Consider RD mismatch Microelectronic circuits

16. Consider gm mismatch Figure 7.11 Analysis of the MOS differential amplifier to determine the common-mode gain resulting from a mismatch in the gm values of Q1 and Q2. Microelectronic circuits

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18. Input offset voltage Figure 7.25(a) The MOS differential pair with both inputs grounded. Owing to device and resistor mismatches, a finite dc output voltage VO results. (b) Application of a voltage equal to the input offset voltage VOS to the terminals with opposite polarity reduces VO to zero. Microelectronic circuits

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21. Differential amplifier with active load Microelectronic circuits

22. Differential amplifier with active load Active load • Differential gain • Common-mode gain et CMRR • Input offset voltage Microelectronic circuits

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24. 1. Find the transconductance Gm Figure 7.29 Determining the short-circuit transconductance Gm;io/vidof the active-loaded MOS differential pair. Microelectronic circuits

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26. 2. Find the output resistance Ro 3. Find the differential gain Microelectronic circuits

27. Common-mode gain et CMRR Figure 7.31 Analysis of the active-loaded MOS differential amplifier to determine its common-mode gain. Microelectronic circuits

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29. Frequency response Microelectronic circuits

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