Table cleanup details
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Table cleanup details. Prepared by Ted for the 1st trigger rep meeting (July 13th, 2005). TDWG Organization. TDWG Heads: Kirsten and Ted Trigger Table Creation and Testing Coordinator: Veronica Sorin / Zeynep Gunay

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Table cleanup details

Table cleanup details

Prepared by Ted for the 1st trigger rep meeting

(July 13th, 2005)


Tdwg organization

TDWG Organization

TDWG Heads: Kirsten and Ted

Trigger Table Creation and Testing Coordinator: Veronica Sorin / Zeynep Gunay

Technical Support: Trigger SPLs Vadim Rusu/Roberto Carso/Veronique Boisvert

Trigger Software Coordinator: Daniel Whiteson

Trigger Database: Tom Wright

Trigger Representatives:

  • Exotics Group: Vadim Rusu and Oscar Gonzalez Lopez

  • QCD Group: Mary Convery, Gene Flanagan and Mario Campanelli

  • Top Group: Veronique Boisvert and Ambra Gresele

  • EWK Group: Jiyeon Han

  • B Physics: Konstantin Anikeev and Simone Donati

    Now we have the FULL GROUP, this is our 1st Trigger Rep meeting…


Reminder plan for summer

Reminder: Plan for Summer

  • Phase I: Get system in stable condition (with improvements)

    (June - early July)

    we are now at step II, final physics tables waiting

    for EOS tests

  • Phase II: Trigger Table Cleanup and Optimization

    (today’s focus)

  • Phase III: Integrate new triggers

    (August - Sept)


Phase i get system in stable condition see veronica s talk for details

Phase I: Get system in stable condition--> see Veronica’s talk for details

  • Step I: Improving L2 JETs. DONE

    • L2 JETs: improved the “Junk Enhanced Trigger”

    • ROF shoulder threshold at full scale

    • Opened up single track trigger at luminosity below 40E30 (JET_CALIB)

    • Take data for a few stores with no other change,

      L2 JETs cross section improved dramatically

      As a result: triggers with DPS at L2 released much earlier

  • Step II: Switch to new XTRP firmware (early July) ready soon

    • Check track trigger rate changes due to adjacent linker veto

    • Mt cut trigger as test trigger with prescale, map out performace

    • CLC multiplicity trigger as test trigger with prescale, map out performance

    • Added new Z to BBbar and MET + b-jet triggers

    • Take data for a few stores with no other change, data for offline analysis

      Will see how much improvements the new track firmware will bring soon


Phase ii table cleaning and optimizing

Phase II: Table cleaning and optimizing

What’s the goal?

  • Removing useless or obsolete triggers

  • Add a few mature fully tested triggers

  • Open up more triggers earlier at lower luminosity

  • Increase 20KHz threshold up to 25KHz

  • To pave the road for CLCM trigger and Mt triggers

    and integrate other test triggers

    This is the first step towards table unification

    The details next….


Table cleaning 1 l1 ten trk2 drives l2 ps 0 l1 ten trk2

Table cleaning 1: L1_TEN_TRK2 drivesL2_PS0_L1_TEN_TRK2

This is in both high and low lumi tables, doing nothing except

using extra L1 bandwidth (will have some overlap)

Should be at least with PS250: L1_TEN_TRK2_PS250

Running at 6KHz

doing nothing, while

overall L1A is 14KHz


Table cleaning 2 l1 two trk10 dphi20 dps champ trigger

Table cleaning 2: L1_TWO_TRK10_DPHI20_DPS (CHAMP trigger)

  • This trigger is in both high and low lumi tables, very high L1 rate at high luminosity when DPS is released.

    fully open this trigger with lumi enable at around ~60E30, without DPS.

running at 4KHz,

mostly fake junk!

wasting L1 bandwidth


Table cleaning 2 cont l1 two trk10 dphi20 dps champ trigger

Table cleaning 2 (cont): L1_TWO_TRK10_DPHI20_DPS (CHAMP trigger)

  • At low luminosity, it behaves ok at L2. Much cleaner/pure evts

  • Remove the DPS at L1! fully open it below ~ 60E30

  • Will get more useful data, without DPS

  • Everyone wins here

Running at

~30Hz at L2,

mostly rejected

at L3! Wasting L2

bandwidth…


Table cleaning 3 already done l1 trk10 ps250 for jet calib move to dirac path

Table cleaning 3 (already done): L1_TRK10_PS250 for JET_CALIB: move to DIRAC path

This is in both high and low lumi tables, very low rate though.

Fully enable (no PS) this trigger at luminosity below 40E30, to get more data for JET_CALIB. (done already). Thanks Ken who worked closely with us.


Table cleaning 4 l1 mb clc ps10k for minibias 1hz

Table cleaning 4: L1_MB_CLC_PS10K for MINIBIAS_1HZ

  • This trigger is rate limited at L2: L2_RL1.3Hz, RL1Hz

  • reduce the rate at L1: PS100K

  • Have L2 RL3Hz which feeds L3 multiplicity with cut at 20 (to increase its rate)

  • Then L3 prescale by 3, 1Hz for Minibias dataset (keep this the same)

  • Have another L2_RL1.3Hz drives L3 with reco dataset, which feeds YMON.


Table cleaning 5 l1 tof 14 mip clc ps10k for minibias 1hz

Table cleaning 5: L1_TOF_14_MIP_&_CLC_PS10K for MINIBIAS_1HZ

  • This trigger is currently rate limited at L2: L2_RL0.5Hz

  • running at about the same rate as L1_MB_CLC_PS10K, doesn’t do much

  • Remove this trigger, free up L1 bit with high prescale to be used to

    control the L1_TWO_TRK2_PS200 (high rate).


Table cleaning 6 l1 two trk2 ps200

Table cleaning 6: L1_TWO_TRK2_PS200

  • This backup trigger is only in low lumi table

  • It drives L2_PS1K_L1_TWO_TRK2 and L2_TWO_TRK2_D100_PS20

  • Ideally, would like to replace L1_TWO_TRK2_PS200 with PS4K

  • But only four L1 bits can be prescaled by more than 255

  • change the PS to 4000 instead, and PS20 away at L2, PS1K ->PS50


Table cleaning 7 unused datasets

Table cleaning 7: “unused?” datasets

Anyone else use these datasets?

PLUG_DIJET

JET_20_CENTRAL

All DIJET_MASS (TWO_JET_xx_Mxxx)

So far, no one claimed any of the datasets.

Will remove them.


Table cleaning 8 l1 em8 met15 replaced by l1 em8

Table cleaning 8: L1_EM8_&_MET15 replaced by L1_EM8

  • Specific option L1_MET15_v-1 Instance of MET.

    • 1. ET = 15 GeV

    • 2. SUMET_THRESH_CENTRAL = 1 GeV

    • 3. SUMET_THRESH_PLUG = 1 GeV

    • 4. Generated Down Load (Instance of MET):

    • 1. PREFRED_INPUT_BIT = 2 integer

    • 2. PREFRED_OUTPUT_BIT = 2 integer

    • 3. FRED_INPUT_BIT = 25 integer

      Need to add MET15 requirement at L2 once L1_MET15 is removed


Table cleaning 8 l1 em8 met15 replaced by l1 em81

Table cleaning 8: L1_EM8_&_MET15 replaced by L1_EM8

Trigger L2_CEM20_L1_MET15_v-1 Bit: [22(3)]

Specific option DCAS_HIGH_EM_v-2 Instance of DCAS_HIGH_EM.

1.DCAS_HIGH_EM_CENTRAL_SEED = 8 GeV

2.DCAS_HIGH_EM_CENTRAL_SHOULDER = 7.5 GeV

3.DCAS_HIGH_EM_FORWARD_SEED = 8 GeV

4.DCAS_HIGH_EM_FORWARD_SHOULDER = 7.5 GeV

5.DCAS_HIGH_EM_PLUG_SEED = 8 GeV

6.DCAS_HIGH_EM_PLUG_SHOULDER = 7.5 GeV

Specific option L2_CEM20_v-1 Instance of PhotonReces.

1.NUMBER = 1

2.ET = 20 GeV

3.HAD_EM = .125

4.ISO_FRACTION = 999

5.ISO_ET = 999 GeV

6.ABS_ETA_MIN = 0

7.ABS_ETA_MAX = 1.1


Table cleaning 9 replace l1 em8 cmu1 5 pt1 5 with l1 em8

Table cleaning 9:replace L1_EM8_&CMU1.5_PT1.5 with L1_EM8

  • Trigger L1_EM8_&_CMU1.5_PT1.5_v-2 Bit: [10(2)]

  • Specific option L1_CMU1.5_PT1.5_v-1 Instance of MUON_CMU(P).

    1.CMU_STUB_PT = 1.5 GeV/c

    2.REQUIRE_HTDC_CMU = 0

    3.REQUIRE_CSP = 0

    4.REQUIRE_CMP = 0

    5.CMU_XFT_PT = 1.52 GeV/c

    Generated Down Load (Instance of MUON_CMU(P)):

    1.PREFRED_INPUT_BIT = 1 integer

    2.PREFRED_OUTPUT_BIT = 25 integer

    3.FRED_INPUT_BIT = 12 integer


Table cleaning 9 replace l1 em8 cmu1 5 pt1 5 with l1 em81

Table cleaning 9:replace L1_EM8_&CMU1.5_PT1.5 with L1_EM8

  • Trigger L2_EM12_ISO_&_CMUP1.5_PT3_v-1 Bit: [49]

  • Specific option L2_CMUP1.5_PT3_v-1 Instance of Muon.

    1.NUMBER = 1

    2.XFT_LAYERS = 4

    3.XFT_PT = 3.04 GeV/c

    4.CALOR_TYPE = 0

    5.MUON_TYPE = 3

    already has CMUP requirement at L2 with PT3


Table cleaning 10 replace l1 em8 cmx1 5 pt2 csx by l1 em8

Table cleaning 10:replace L1_EM8_CMX1.5_PT2_CSX by L1_EM8

Specific option L1_CMX1.5_PT2_CSX_v-3 Instance of MUON_CMX.

1.CMX_STUB_PT = 1.5 GeV/c

2.REQUIRE_CSX = 1

3.CMX_XFT_PT = 2.04 GeV/c

4.CMX_XFT_LAYERS = 4

5.REQUIRE_HTDC_CMX = 0

Generated Down Load (Instance of MUON_CMX):

1.PREFRED_INPUT_BIT = 8 integer

2.PREFRED_OUTPUT_BIT = 32 integer

3.FRED_INPUT_BIT = 9 integer


Table cleaning 10 replace l1 em8 cmx1 5 pt2 csx by l1 em81

Table cleaning 10:replace L1_EM8_CMX1.5_PT2_CSX by L1_EM8

Trigger L2_EM12_ISO_&_CMX1.5_PT2_CSX_v-1 Bit: [50]

1. Specific option DCAS_HIGH_EM_v-2 Instance of DCAS_HIGH_EM.

1.DCAS_HIGH_EM_CENTRAL_SEED = 8 GeV

2.DCAS_HIGH_EM_CENTRAL_SHOULDER = 7.5 GeV

3.DCAS_HIGH_EM_FORWARD_SEED = 8 GeV

4.DCAS_HIGH_EM_FORWARD_SHOULDER = 7.5 GeV

5.DCAS_HIGH_EM_PLUG_SEED = 8 GeV

6.DCAS_HIGH_EM_PLUG_SHOULDER = 7.5 GeV

2.Specific option L2_EM12_ISO_v-1 Instance of PhotonReces.1.NUMBER = 1

2.ET = 12 GeV

3.HAD_EM = .125

4.ISO_FRACTION = .15

5.ISO_ET = 3 GeV

6.ABS_ETA_MIN = 0

7.ABS_ETA_MAX = 3.6 need to add CMX requirements at L2


Table cleaning 11 replace l1 jet10 sumet90 by l1 jet10

Table cleaning 11:replace L1_JET10_&_SUMET90 by L1_JET10

  • Specific option L1_SUMET90_v-1 Instance of SUMET.

    1.ET = 90 GeV

    2.SUMET_THRESH_PLUG = 1 GeV

    3.SUMET_THRESH_CENTRAL = 1 GeV

    Generated Down Load (Instance of SUMET):

    1.PREFRED_INPUT_BIT = 0 integer

    2.FRED_INPUT_BIT = 6 integer

    3.PREFRED_OUTPUT_BIT = 0 integer


Table cleaning 11 replace l1 jet10 sumet90 by l1 jet101

Table cleaning 11:replace L1_JET10_&_SUMET90 by L1_JET10

  • Specific option L2_THREE_JET10_SUMET90_v-1 Instance of ClusterSum.

    1.NUMBER = 3

    2.ET_TOTAL = 90 GeV

    3.ET = 10 GeV

    Already have SUMET90 cut at L2


Table cleaning 12

Table cleaning 12:

  • J/Psi --> ee running off by existing 4 GeV electron + track at L1

    • free up one L1 bit and two DIRAC bits

    • keep L2/L3 the same


Table cleaning 13 relax the dx cut at l3 from 20 cm to 40 cm see rolf s talk at last tdwg

Table cleaning 13:relax the dx cut at L3: from 20 cm to 40 cmsee Rolf’s talk at last TDWG

Rolf’s list from PHYSICS_3_04 [1,670,576]

bit name ptcut dxcut

1 BBBAR_TWO_CMUP3:6 3 25

16 B_SEMI_CMUP4_SVT_TRACK2_D120:2 4 20

17 B_SEMI_CMUP4_TRACK2_D120_DPS:1 4 20

20 CEM4_CMUP4:8 4 20

23 CMUP4_PEM8:7 4 20

40 DIMUON_CMUP4_CMX4:8 4 20

41 DIMUON_CMUPCMUP4:5 4 20

87 JPSI_CMUP4_CMU_L2_DPS:2 4 20

88 JPSI_CMUP4_CMX_L2_DPS:2 4 20

116 MUON_CMUP4:7 4 20

130 PHOTON_CMUP:7 3 25

144 RAREB_CMUPCMU:7 3 25

145 RAREB_CMUPCMX:10 3 25

161 UPSILON_CMUP_CMU:6 4 20

162 UPSILON_CMUP_CMX:10 4 20


Triggers to be added

Triggers to be added:

  • backup trigger for MET + b-jet: L1_MET15_JET5_TWO_TRK2

    • prescale at L2 by 1000 (check rate), auto-accept at L3.

  • backup trigger for L1_MET15 (do we still need above backup?)

    • prescale at L1 by 250 (cannot prescale by 1000)

    • rate limited to 0.5 (?) Hz at L2. L3 auto-accept

  • Remove old Z to BBbar trigger (if new trigger data is ok)

  • Change COT spike bit to bit 63.

    Anything else which is FULLY ready ?

    We already have 15 items on this to-do-list!

    Try not change too many at one time!


Phase iii integrate new triggers

Phase III: Integrate new triggers

August to Sept:

  • Finish integrating all mature fully tested triggers

  • If you have triggers which are fully ready, they will be integrated!

  • If you have triggers need more tests, let’s test them soon

  • All new/test trigger requests should be done by Trigger Reps.from now on

  • Trigger Reps: please finalize your list/plan at next two meetings

  • Will have trigger rep meeting starting next week (Wed 2-3pm?)

    The meeting will be dedicated for integrating new triggers

  • Expand L2 bits from 128 to 192 (“Non-beam test successful” two days ago)

    Daniel will give a status report soon

  • Take full advantage of new EVB upgrade,

    Pulsar Phase II L2 system and

    SVT upgrade (partially installed by then)

    We should be able to handle 150E30 luminosity with all the improvements

    The table should be stable by then for this luminosity range


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