Single-Electron Memory

1. Single-Electron Memory Keivan Etessam-Yazdani “Single-electron memory for giga-to-tera bit storage,” Yano et al., Proc. Of the IEEE, VOL. 87, NO. 4, APRIL 1999 10/6/2004

2. Outline • Introduction • Single electron memory • Single-electron box • Operating principal • Sensing scheme • Array architecture • Error rate and low charge limit • 128 Mb Memory • Recent Work • Conclusion

3. Introduction • Single-electron devices do NOT work with only one electron! • a single-electron device utilizes one-electron-precision charge transfer based on the Coulomb blockade effect • Typical number of electron involved :100-1000/Op • Advantages • Good scalability • Low power • High speed • Challenges • Background charges • Fabrication

4. Single-electron memory • Single-electron memory is preferred to logic • We can still keep using CMOS for logic • Single-electron devices have poor capability of talking to each other • History • 1969: Lambe and Jalkevic-the charge quantization in single-electron box-like structure was investigated • mid-1980’s: The research on single-electron physics/device became active • 1987: Likharev, Dolan and Fulton-Single electron transistor was made and dynamic behavior of single charge transfer was investigated • 1993: Nakazato and Ahmed-First low temperature single- electron memory was made • 1993: Yano et al., First room-temperature single-electron memory was made using thin polysilicon • 1998: Yano et al., 128-Mb memory using single-electron memory was reported

5. Single-electron box • Transfer from reservoir to dot • Motion controlled by gate voltage • To move 1 electron apply q/C where C is the capacitance between gate and dot • Thermal energy and fluctuation in charge Q=(2kTC)0.5=q n • At room temperature, assuming C=1fF n=18Q can be treated as a continuous quantity • If C is small approaching q2/(2kT) n=1 Q is an integer multiple of q • Coulomb Blockade effect • Coulomb energy~Thermal energyCoulomb Blockade • Operation at room temperature requires sub 10nm lithography!

6. Operating principle • Vt<Vb1 non-linear R • Vt>Vb1 linear R

7. Operating principle-Cnt. • The hysteresis can be used for memory • The number of stored electrons is precisely controlled by Coulomb blockade effect • The precision is determined by the strength of Coulomb energy relative to thermal energy

8. Sensing Scheme • Reduce the capacitance coupled to the storage node • Place a local amplifier next to the cell • Embed the dot into an amplifier:”one-transistor floating-dot memory” • Reduced parasitic capacitance • 0.2aF1V • Shift in Vth  by sensing current the stored information can be read

9. Nano-Si memory • If channel and dot are defined based on lithography the operation temperature will be low • Solution: use natural nanostructures • 3.4nm Channel poly-Si sandwiched between oxide shows a very low C • Gate length/channel width is 100nm • Gate oxide is 150nm

10. Nano-Si memory performance • Thick poly silicon channels do not result in a Hysteresis • The fabricated memory is stable:1hr • In sub-5nm channels strong vertical quantum confinement effects are expected

11. Array architecture

12. Error rate and low charge limit • Is storage based on such small number of stored electrons reliable for giga-scale applications? • Stochastic electron-count scattering is proportional to N0.5 where N is the total number of electrons used for storing 1 bit • 5-10 electron is minimum

13. 128Mb Memory

14. Recent Work • Focus of publications in 2003, 2004 • Modeling • Fabrication • Material • Background charge

15. Conclusion • Single-electron devices • Advantages • Challenges • Operation • Room temperature operation • Nano-Si memory • Error rate and charge limit