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BEAM ENERGY ACQUISITION CARD BEAPowerPoint Presentation

BEAM ENERGY ACQUISITION CARD BEA

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BEAM ENERGY ACQUISITION CARD BEA

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BEAM ENERGY ACQUISITION CARDBEA

- The BEA cards are part of the Beam Energy Tracking System BETS.
- They are used to measure the currents of the main bending magnets, the septa MSD, the quadrupoles Q4R and the charging voltages of kicker and dilution generators MKD and MKB.
- A BEA card has two signal inputs 0 to 10V.
- There are two version of the card. A single height one BEA-3U and a double height one BEA-6U. Both cards are functionally identical. The only difference is that the BEA-6U card has a 1300nm single mode fibre optic output which makes it suitable for long distance signal transmission.
- All cards have a 820nm multimode fibre optic output for short distance transmission.

LBDS BEA card

- The bending magnet current is measured with DCCTs which provide a full scale output voltage of 10V for a current of 13kA. The BEA-6U card measures the DCCT output voltage.
- During normal operation the current ramps up from 739A at 450GeV to 11500A at 7TeV. The max. di/dt is 10A/s.
- The BEA input voltage is 0.57V at 450GeV and 8.85V at 7TeV.
- The design goal for the BEA cards is that the signals within the range of operation are measured with an error less than 0.1%.
- Accuracy is critical for low input signals. The input of 0.57V at 450GeV is resolved with 3700LSB.
- One LSB is 154µV.
- The error must be less than 3.7LSB or 570µV.

LBDS BEA card

- The BEA-3U cards measure the charging voltages of the MKD and MKB generators. The input voltage range during operation is approximately the same as for the BEA-6U cards.
- The max. dV/dt of the input voltage is 7.7mV/s.
- For accurate tracking of the signals during ramping up the difference between two consecutive samples must be smaller than max. tolerated relative error.
- The resulting upper limit for the sampling period is570µV / 7.7mV/s = 74ms.
- The actual sample period is 1.024ms. This allows some redundancy and ensures good coherence between signals from difference parts of the beam dumping system.

LBDS BEA card

LBDS BEA card

- The ADC makes one sample every 16µs.
- In one sub-cycle it samples the 4 signals Ch1, Ch2, Full-Scale-Ref. and Zero-Ref.
- Sub-cycle duration is 64µs. Sampling frequency for every signal is fs = 15625Hz.
- In one full-cycle 16 sub-cycles are performed and the average value of each of the 4 signals is calculated.
- Averaging over 16 samples improves resolution by 2 bits. When subtracting ADC noise of 1 bit still 1 bit of extra resolution is gained. The result are 17 bits of resolution.
- The complete measurement cycle has a duration of 16µs × 4 × 16 = 1024µs. The effective sample rate for each signal is therefore fse = 1/1024µs = 976.5625Hz.
- The results of the full cycle are transmitted over the serial output.

LBDS BEA card

Amplifier accuracy

- DC offset <100µV
- Gain error < 2·10-4

Anti aliasing input filter

- 3rd order Bessel filter
- 3dB bandwidth 240Hz
- Attenuation at fs/2 7812.5Hz is -78dB
- Phase delay is 1ms
- Settling time to 0.1% for input step is 5ms

LBDS BEA card

- The BEA cards use a LTC1605A analogue do digital converter from Linear Technology.
- Alternatives are AD976BR from Analog Devices and ADS7805UB from Texas Instruments.
- Conversion principle is successive approximation.
- Input voltage range is -10 to +10V.
- Maximum sampling frequency is 100kHz. Actual sampling frequency is 62.5kHz.
- Resolution is 16bit
- Integral linearity error <2LSB
- The “A” type has no missing codes for 16bits.
- The RMS output noise is 1LSB.
- Data output port is 16bit parallel.

LBDS BEA card

Adjustment of ADC

- ADC input voltage range is adjusted to be from -10.1V to +10.1V.
- The buffer has a gain of 2.
- Even with out any adjustment the buffer output voltage is always within the ADC input range.
- Zero and full-scale reference are continuously measured. Any drift of ADC and buffer is automatically corrected.

LBDS BEA card

Advantages

- Total accuracy only depends on voltage reference.
- Offset and gain errors of buffer and ADC are corrected.

Disadvantages

- Approximately 1% of ADC input range is not used.
- Effective sampling rate for signals is reduced because zero and full-scale reference have to be measured as well.

Voltage Reference

- Vref = 10.000V±1mV
- Long term stability typically 30ppm

LBDS BEA card

Control logic

- Xilinx Spartan 3 FPGA
- Clock frequency is 40MHz
- Controls ADC and multiplexer.
- Performs averaging of samples
- Generates serial output.
- Handles status signals from two digital inputs and power supplies monitoring.

LBDS BEA card

The data is Manchester encoded and transmitted with 500kbit/s.

LBDS BEA card

LBDS BEA card

Power at receivercan be from-4.1dBm = 389µW to-15.3dBm = 29.5µW.

Typically it will be

-9.7dBm = 107µW.

LBDS BEA card

- Transmitter launch power 1mW=0dBm ±1dBm
- Temperature variation of launch power ±2dB
- Power degradation due to aging -3dB
- Coupling into fibre -0.5dB
- Connector losses -0.2dB to -0.4dB per connector. With 4 connectors the losses are -0.8dB to -1.6dB
- Fibre losses -0.2dB/km to -0.3dB/km.For 10km the losses are -2dB to -3dB
- Additional losses. This takes into account the additional devices in the transmission path. In this case it is the splitter 50:50 with attenuation of -3.3dB to -3.7dB.
- Receiver coupling -0.5dB

LBDS BEA card

LBDS BEA card

LBDS BEA card