Anastas misev marjan gusev http twins ii edu mk
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Anastas Misev Marjan Gusev http://twins.ii.edu.mk/. Simulators for computer architecture classes. The need. Computer architecture is a foundational subject for the entire CS education Learning computer architecture can be frustrating if left in theory

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Simulators for computer architecture classes

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Anastas misev marjan gusev http twins ii edu mk

Anastas Misev

Marjan Gusev

http://twins.ii.edu.mk/

Simulators for computer architecture classes


The need

The need

  • Computer architecture is a foundational subject for the entire CS education

  • Learning computer architecture can be frustrating if left in theory

  • Visualization explains the architectural concepts in more acceptable way to the students

  • Using visual simulators is becoming an irreplaceable element in CS education

  • Simulators makes the devices more the accessible


The simulators

The simulators

  • Different products available

  • Development of own tools

  • Student projects

  • Most important

    • SuperSim2 – a visual PostRISC simulator

    • Tomasulo – web based visual simulator of the popular algorithm

    • Scoreboard – visual and configurable simulator for the scoreboard algorithm

    • 8051 simulator

    • VDD for an external programmable device

  • The advantages of home production


Supersim 2 0

SuperSim 2.0

  • User code, pseudo assembler

  • Syntax checking, error indication

  • Extensive configuration

  • Simulation varying from simple RISC to advanced PostRISC

  • Step by step execution

  • Visualization of the pipeline

  • Non visual mode for high performance

  • Vast logging capabilities for performance analysis

  • Detailed statistics


Code editor

Code editor

  • Editing

  • File management

  • Syntax check


Risc runtime

RISC runtime

  • Basic features

  • One pipeline

  • Registers

  • Data cache


Configuration 1

Configuration 1

  • Execution units

    • Number and type

  • Rates

    • Issue

    • Dispatch


Configuration 2

Configuration 2

  • Usage of shelving

  • Reservation stations

    • Type

    • Size


Configuration 3

Configuration 3

  • Usage of register renaming

  • Number of registers

  • Access


Configuration 4

Configuration 4

  • Usage of out-of-order

  • Reorder buffer

    • Size


Configuration 5

Configuration 5

  • Usage of branch processing

  • Speculation

  • Static and dynamic

  • Explicit and implicit

  • Global


Postrisc runtime

PostRISC runtime

  • Pipeline stages

  • Animated instruction flow

  • Step-by-step execution

  • Superscalar features


Simulators for computer architecture classes

ROB

  • Sequential consistency

  • Circular buffer

    • Head

    • Tail

  • Instructions by stage


Registry file

Registry file

  • Architecture registers

  • Rename registers

    • Mapping

    • Value

    • Latest

  • Visualizes 32+32 registers


Branch tables

Branch tables

  • Explicit prediction

    • BHT

  • Implicit prediction

    • BTAC

  • Global 2-bit


Data cache

Data cache

  • 1024 locations

  • Word addressible

  • To be extended to multilevel


Statistics

Statistics

  • Detailed statistics

    • Usage %

    • IPC per stage

    • Prediction

    • Renaming

    • Memory dependencies

    • ...


Supersim 2 01

SuperSim 2.0

  • Visualy explains ILP concepts

  • Configurable

  • Programmable

  • Easy to use and students like it

http://twins.ii.edu.mk/supersim/


Tomasulo

Tomasulo

  • Student project

  • Web based

  • Highly graphical

  • Configurable

  • Self explanatory

  • 1-1 mapping of the tables used


Scoreboard

Scoreboard

  • Also students project

  • Windows application

  • Fully configurable

  • Can run user code

  • Animated or step-by-step execution

  • Configurable operation latencies


8051 simulator

8051 simulator

  • 8031/8051 simulator

  • Student project

  • Includes

    • IDE

    • Code highlighting

    • Debugging

    • Step-by-step execution

  • Modular design


Virtual device driver

Virtual Device Driver

  • Student project

  • Replaces a single external ISA device (8255 based)

  • Used for I/O assembler programming classes

  • Uses windows VDD and a front end application as I/O


Conclusion

Conclusion

  • The simulators used in several courses covering computer architecture

  • Students interest and motivation is much higher

  • “One device per student” environment

  • Motivation to continue the development of new tool, mainly as student projects


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