Superscalar pipelines
This presentation is the property of its rightful owner.
Sponsored Links
1 / 18

Superscalar Pipelines PowerPoint PPT Presentation


  • 168 Views
  • Uploaded on
  • Presentation posted in: General

Superscalar Pipelines. Erik Feineis Chris Ielmoni Talal Abdulhaq. Overview. Limitations 1. Problem with Rigid Scalar Pipelines 2. From Scalar to Superscalar Pipelines Organization 1. Parallel 2. Diversified 3. Dynamic Design 1. Instruction Fetching 2. Instruction Decoding

Download Presentation

Superscalar Pipelines

An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -

Presentation Transcript


Superscalar pipelines

Superscalar Pipelines

Erik Feineis

Chris Ielmoni

Talal Abdulhaq


Overview

Overview

  • Limitations

    1. Problem with Rigid Scalar Pipelines

    2. From Scalar to Superscalar Pipelines

  • Organization

    1. Parallel

    2. Diversified

    3. Dynamic

  • Design

    1. Instruction Fetching

    2. Instruction Decoding

    3. Instruction Dispatching

    4. Instruction Execution

    5. Instruction Completion & Retiring


Limitations problem with rigid scalar pipelines

[ Limitations ]Problem with Rigid Scalar Pipelines


Limitations from scalar to superscalar

[ Limitations ]From Scalar to Superscalar

  • Parallel Pipelines

    - Wide pipelines

    - Advance multiple instructions per cycle

  • Diversified Pipelines

    - Multiple functional unit types

    - Mix of different functional units

  • Dynamic Pipelines

    - Out of order execution

    - Distributed functional units


Organization parallel pipeline

[ Organization ]Parallel Pipeline


Organization example intel pentium parallel pipeline

[ Organization (Example) ]Intel Pentium Parallel Pipeline


Organization diversified pipeline

[ Organization ]Diversified Pipeline


Organization dynamic pipelines

[ Organization ]Dynamic Pipelines


Design superscalar pipeline design

[ Design ]Superscalar Pipeline Design


Design instruction fetching

[ Design ]Instruction Fetching

  • Objective: Maximize Instruction Throughput

  • Possible Problems

    - Misalignment of the fetch group in instruction cache

    - Branch instructions within the fetch group

  • Solutions

    - Static alignment at compile time

    - Dynamic alignment at run time

    - Branch prediction and speculation


Design instruction decoding

[ Design ]Instruction Decoding

  • Primary Tasks

    - Identify individual instructions

    - Determine instruction types

    - Detect inter-instruction dependences

  • Important Factors

    - Instruction set architecture

    - Width of parallel pipeline


Design example intel pentium pro fetch decode unit

[ Design (Example) ]Intel Pentium Pro Fetch/Decode Unit


Design instruction dispatching

[ Design ]Instruction Dispatching

  • Parallel Pipeline

    - Centralized instruction fetching

    - Centralized instruction decoding

  • Diversified Pipeline

    - Distributed instruction execution


Design necessity of instruction dispatching

[ Design ]Necessity of Instruction Dispatching


Design instruction execution

[ Design ]Instruction Execution

  • Current Trends

    - More parallelism

    - Deeper pipes

    - More diversity

  • Key Functional Units

    - Integer units

    - Floating-point units

  • Other Functional Units

    - Branch units

    - Load/Store units

    - Specialized units (image, graphic, video, DSP)

  • Current Challenge

    - Load/Store parallel processing


Design examples specialized execution units

[ Design (Examples) ]Specialized Execution Units


Design instruction completion retiring

[ Design ]Instruction Completion / Retiring

  • Out-of-order execution

    - ALU instructions

    - Load/store instructions

  • In-order completion/retiring

    - Precise exception

    - Memory consistency

  • Solutions

    - Reorder buffer (in-order completion)

    - Store buffer (in-order retiring)


The end

The End


  • Login