Jeffrey h reed peter athanas tamal bose carl dietrich michael hsiao tim newman cameron patterson
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Jeffrey H. Reed, Peter Athanas, Tamal Bose, Carl Dietrich, Michael Hsiao, Tim Newman, Cameron Patterson. Software Defined Radio Research at [email protected] Part 1: Rapid prototyping and experimentation. Contents ½: Part 1: Rapid Prototyping and Experimentation.

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Jeffrey H. Reed, Peter Athanas, Tamal Bose, Carl Dietrich, Michael Hsiao, Tim Newman, Cameron Patterson

Software Defined Radio Research at [email protected] 1: Rapid prototyping and experimentation

Contents ½: Part 1: Rapid Prototyping and Experimentation

  • Open Source SCA Implementation::Embedded (OSSIE)

    • Rapid prototyping of radios using middleware

    • Supports education

    • component base radio

  • Wireless-on-Demand --- Runtime reconfigurable SDR

    • Building-block library of DSP components

    • Assembled (placed and routed) as needed on demand within the embedded system

    • Very fast assembly and minimal radio down-time

    • Not the Xilinx PR flow

    • Plan to integrate with OSSIE for complete radio development environment

OSSIE Development




Contents 2/2: Part 1: Rapid Prototyping and Experimentation

  • Ultra small form factor radio

    • Works with Wireless on Demand

    • Applications include microUAV radio and control

  • Cognitive Radio Network (CORNET) Testbed

    • 48 node SDR/CR using experimental Motorola chip

    • Support experiments in

      • Signal detection/classification

      • Indoor location estimation

      • Smart jamming

  • Testing and Verification of SDR/CR

    • Integration of formal and informal methods to test complex code

< 1” x 1” die stack

For Ultra Small

Form Factor Radio


Contents for Part 2: Applications

  • Distribute wireless cloud computing

    • Cloud computing with wireless connections

    • Power sensitive radio formation and computing load distribution

    • Applications: Signal detection, distributed MIMO, location estimation

  • Public safety radio efforts

    • Cognitive radio bridge between standards

    • Low cost P-25 radio

  • SDR/CR security

    • Determine security vulnerabilities of SDR and CR

    • Novel approaches to security

    • Generic security APIs

      Contributing faculty: Bostian, Ellingson, Newman, Reed, and Park. Note: Our cognitive radio (CR) work is covered in another presentation that complements this one

OSSIE: Open Source SCA-Based Software for Education, Research, and Rapid Prototyping

Carl B. Dietrich and Jeffrey H. Reed

OSSIE* Provides…

  • Easy-to-use SDR Tools

    • Effective now, upgradable for a new level of interactive application design, testing, and configuration

  • High-impact SDR Education

    • Hands-on SCA-based SDR experience

  • Low-cost Rapid Prototyping Environment

    • Promotes consistent design, portability

  • An Open-Source Platform for Relevant Research

    • Well suited to universities

    • Independent of commercial frameworks

    • Embodies current DoD approach to SDR – a baseline for innovation


OSSIE now has three major uses

  • Education

    • Lab exercises developed by Naval Postgraduate School and VT, available at

    • Courses at VT, NPS, Indiana/Purdue Ft. Wayne

    • Short Courses at Virginia Tech, NAVAIR, US ARMY CERDEC, SDR Forum

  • Research

    • Virginia Tech, NPS, LTS, etc.

  • Rapid Prototyping

    • Used by engineers from DRS, Aerospace Corp., NAVAIR, Rockwell Collins, SAIC, Thales, US ARMY CERDEC

OSSIE Users/Supporters

Sponsors and USERS

Universities that Have USED OSSIE

Carnegie Mellon University

Clemson University

Indiana University/Purdue University Ft. Wayne

Lawrence Tech University

Naval Postgraduate School

University of Kansas

University of Maryland

Worcester Polytechnic Institute

  • SAIC

  • Texas Instruments

  • Tektronix

  • NSF

  • LTS


  • SCA Technica

  • EF Johnson

  • Naval Postgraduate School

OSSIE provides two GUI-based tools

OSSIE Eclipse Feature (OEF)

  • GUI based component and waveform development

  • Leverages Eclipse IDE, plug-ins

    Waveform Application Visualization and Debugging Tool (ALF)

  • Manage, display, probe, and interconnect waveform applications and components

OEF helps developers create OSSIE waveforms and components

  • Quickly learn to use drag-and-drop interface

  • Run Node Booter, ALF, legacy tools from GUI

  • Leverage Eclipse plug-ins, e.g. Subclipse

  • Interface with cross compilers

ALF GUI lets developers run, debug, and interconnect applications

  • Install/start, stop/uninstall waveform applications

  • View block diagrams

  • Inject or probe signals with supplied plug-ins

  • Add your own plug-ins

  • Launch single components as applications

  • Interconnect applications

OSSIE’s tools are easy to use but we can make them even more intuitive

  • Current tools employ and teach SDR, SCA, CORBA concepts, and are quickly learned

  • With appropriate funding, we can enhance these tools to enable interactive waveform development and testing

Our vision is highly interactive, intuitive application development

  • Develop applications interactively

    • Graphical block-level design

    • Build applications live, one component at a time, testing as you go

    • Enable innovative education and research

  • OEF will continue to support stand-alone waveform and component development

  • The path to achieving this vision is clear

    • Key functionalities already exist in current tools

Starting points for the enhanced tools are already here

  • ALF “Compform” feature runs components as stand-alone waveform applications

  • ALF Connection Tool connects components in same or different waveforms

  • OSSIE “Universal GUI” will

    provide control of any OSSIE


  • XML Parsers will allow merging

    composite applications

Enhanced Tools will allow “Live” development (components running)

RF Controller

Rx Freq (MHz): 1.00

Decimation Rate: 256



Decimation Rate: 10

RF Controller


RF Front End

Sound Card

Enhanced Tools: Add, Connect, and Configure Remaining Components

RF Controller

Rx Freq (MHz): 146.55

Decimation Rate: 256


Gain min: 1

Gain max: 1000


Decimation Rate: 10


Modulation: FM

RF Controller




RF Front End

Sound Card

Enhanced Tools: Create Unified Application and GUI

Multimode Analog Receiver

RF Controller

Rx Freq (MHz): 146.58

Decimation Rate: 256


Gain min: 1

Gain max: 1000


Decimation Rate: 10


Modulation: FM

RF Controller




RF Front End

Sound Card

SDR Education: OSSIE Labs

  • NPS & VT-developed labs reinforce SDR, SCA concepts in university, short courses, self-study

    • OSSIE illustrates essential aspects of SCA (Domain and Device Managers, Resources, Devices, Factories, Profiles, etc.)

  • On-line labs help students to:

    • Build waveforms and components

    • Edit component properties

    • Build simple receivers

    • Perform remote waveform debugging over network

  • Quickly create SDR applications

  • Baseline for more advanced development

  • More labs under development

Online Video Tutorials

  • Current videos present key steps to creating and running waveform applications

  • Response has been favorable

  • Next:

    • Videos for all labs

    • Short video clips for

      frequently repeated


SDR Short Courses using OSSIE

  • Half-day courses

    • Wireless @ Virginia Tech Symposium

    • SDR Forum Technical Conference

  • Courses can be offered on-site, customized to an organization’s needs

    • Theory, Enabling Technologies, SDR Architectures, Hands-on Labs

  • Past courses taught at Honeywell, NAVAIR, US ARMY CERDEC, etc.

OSSIE is ideal for rapid prototyping

  • Tools enable rapid development and debugging of components and applications

  • Waveforms for OSSIE’s SCA subset can be ported to commercial frameworks

  • A common rapid prototyping environment fosters a consistent design approach

    • Promotes portability of applications

    • Used by engineers from Aerospace Corp., DRS, NAVAIR, Rockwell Collins, SAIC, Thales, US ARMY CERDEC

OSSIE Enables Future SDR Research

  • Implement and test SDR on Multi-Core Platforms

    • SCA inherently supports distributed applications, demonstrated in OSSIE

    • Homogeneous/heterogeneous multi-core

  • Fuse FPGA reconfiguration with Component-Based SDR

    • VT’s “Wires on Demand” – HW speed, SW reconfigurability

  • Develop Self-Configuring Software for Distributed DSP

    • Ad-hoc SDR networks are ultimate target

    • Distributed capabilities of SCA, OSSIE provide baseline

OSSIE is a good investment

  • Enhanced SDR Tools

  • High-impact SDR Education

  • Powerful, low-cost Rapid Prototyping

  • Defense-Relevant SDR Research

  • We are seeking support for all of the above

Peter AthanasProfessorVirginia TechDept. of Electrical and Computer Engineering


Wires-on-Demand for Radios

  • Building-block library of DSP components

  • Assembled (placed and routed) as needed on demand within the embedded system

  • Very fast assembly and minimal radio down-time

  • Not the Xilinx PR flow

Wires-on-Demand Run-Time Flow

Embedded HW Assembler Performance (Router)

Embedded Tools

Vendor Tools


10,000x faster, 1/1000th memory, for a 10% route delay penalty

WoD In Action

RapidRadio Project


μHPC: A Hardware and Software Configurable, High Performance, Ultra-Small Form Factor Embedded Platform

Cameron Patterson

Configurable Computing Lab


  • Smallest possible size/weight/power/cost for a platform combining:

    • High performance RISC processor capable of running embedded Linux

    • FPGA resources enabling application-optimized digital hardware

    • DRAM and flash memory chips

    • Hardware reconfiguration API for rapidly constructing custom datapaths (e.g. radio transmitters/receivers)

    • DSP performance in excess of the fastest digital signal processor

    • Software and hardware module libraries may be stored on flash or a remote server

    • Power management API

    • Direct interfaces to any additional resources required such as ADCs, DACs, sensors, servos, GPS receiver, …

    • Optional FPGA-implemented floating point, cryptographic algorithms

    • Secure storage of keys/data/algorithms

Single Platform for Communication / Computation / Control

  • Micro Unmanned Aerial Vehicles

  • Software defined / cognitive radio handsets

  • Portable multimedia platforms

  • Remote sensing

  • DSP-intensive control systems

  • Intelligent video surveillance with threat assessment and target tracking

  • Secure embedded applications

A Three-Chip Digital System

65nm FPGA with integrated

550 MHz PowerPC 440 processor

~ $150 in 1000-unit volumes


128 MB in a single chip

~ $40 in 1000-unit volumes

Flash memory

128 MB in a single chip

~ $12 unit price

Low cost courtesy of multimedia players / cell phones

Downsizing Roadmap



< 3” x 3” custom PCB containing just the

FPGA, SDRAM, flash, DAC, ADC, RF circuitry

~ 5” x 7” commercial development board ($400)



< 2” x 2” System in Package

Bare die mounted on a common substrate

< 1” x 1” die stack

Wires on Demand Middleware

  • Uses a library of pre-implemented hardware blocks stored as partial bitstreams

  • Permits hardware modules to be dynamically loaded (placed) and linked (connected) within the FPGA’s “sandbox” region in milliseconds

  • API insulates applications from placement, routing and configuration management details

  • Reuses and defragments sandbox free space

  • Development sponsored by AFRL

Cognitive Radio Network Testbed (CORNET)

Tim Newman and Tamal Bose

Virginia Tech – Cognitive Radio Network Testbed (VT-CORNET)

  • Motivation for building a large scale testbed

  • Some aspects of cognitive radio networks that need experimental verification & testing

    • Model accuracy: Algorithms, protocols, applications, spectrum policy

    • Collect performance and Quality of Service (QoS) measurements for further analysis

    • Reliability and safe operation within heterogeneous networks

    • Realistic conditions

    • Understand interaction of nodes in self-organizing networks

    • Verify legitimate operation of cognitive engines

Large Scale Cognitive Radio Research

  • Cognitive Radio Networks on a Large Scale

    • Large scale research not addressed in other testbeds

    • Cater to small, medium, and large scale research

    • Up to 1 million nodes (physical and virtual)

  • Primary research questions to be addressed

    • Cognitive engine testing in heterogeneous environments

    • Spectrum policy/brokering techniques on a large scale

    • Cognitive networking algorithms on a large scale

  • Secondary research objectives

    • Cognitive network metric standard development

    • Web interface for community research on testbed

Testbed Vision

  • 48 Physical Radio Nodes

    • Located throughout a campus building in the presence of many other wireless networks

    • Universal Software Radio Peripheral (USRP) used as interface between PC and RF frontend

    • Custom designed RF front-end based on new Motorola experimental transceiver chip; 100MHz - 4GHz

    • Open source SDR platform – OSSIE

      • Well established and portable platform built at VT

  • Virtual cognitive radio nodes

    • Large scale simulation of cognitive radios and cognitive radio networks

    • Cluster of virtual nodes already established for epidemiology studies at VT

Hardware Side

Software Side

Physical Cognitive Radio Nodes

Virtual Cognitive Radio Nodes



CR #1

CR #2

CR #3

CR #4

Server Cluster

CR #5

CR #6

VT-CORNET (Hybrid) Vision

Experiment Framework Vision

  • Testbed facility available to any researcher on campus

  • Open source code, protocols, and testing procedures

  • Eventually, available to researchers around the world

  • Authorized users can remotely program our nodes and deploy experiments through the internet anywhere

Currently Operational Testbed (v1.0)

Testbed v1.0: Node Architecture

  • Two Pieces

    • Small PC

    • Universal Software Radio Peripheral

      • See the demo here at DySPAN!

  • Controlled Remotely

    • Ethernet

    • 802.11

  • Built on open source software

    • Open source SCA (OSSIE)

  • RF Frontend: New Motorola transceiver chip (100MHz to 4GHz)

Next Phase

  • Expand to 10 nodes (Apr. 09)

  • Use the new RF frontend daughter board with the Motorola RF chip (100MHz-4GHz) (Dec. 08)

  • Partial deployment in new ICTAS building (June 09)

  • Set up the following demos (June 09):

    • Emergency management (DSA)

    • Cognitive routing algorithms (security)

    • Cognitive jamming

Testing and Verification of SDR / CR

Michael Hsiao

Verification/Testing Strategy of SDR / CR

Units Assembly

Test Generation

SDR/CR System

Test Case




Source Code

(functional units)

Test Coverage







Test Vectors


Resource Units

(DB, XML files,

USRP, etc.)

Test Report



Coverage Report

Formal Analysis Example

  • Program Invariant: an expression of variables at some program location that is always true.

    • Inductive loop invariant at the loop head/exit

    • Find appropriate invariants at different locations to constrain search space


x=0, y=0;

while(c) {


x = x+4;

else {

x = x+2; y= y+1;




An invariant extracted at while loop head:

x ≥ 2  y ≥ 0  x-2y≥2

Formal Analysis (Invariant Extraction)

  • Benefits

    • Guide test generation: provide coverage metric ,etc.

    • Ease impact analysis and maintenance

    • Facilitate code optimization

Instrumented code

True Invariants as Pre-/post-conditions

Invariants Validation via Constraint Solving

Program Execution traces DB

Invariant Detection

from traces

Potential Invariants

Counter-examples from false invariants


Dynamic Analysis

Test Case Generation

  • Directly reuse some test vectors from unit testing

    • Reuse tests that involve interactions between units.

    • Remove mock object codes (e.g. for function call) in unit testing.

  • Event-triggered automated test generation

Event-oriented coverage


automated test


Test Vectors



  • Integration of formal and informal methods to test complex code (especially control code in CR)

  • Formal analysis helps to prune search space and provide useful guidance to testing

    • Some bugs can be discovered by formal analysis alone

  • High quality test cases generated

    • Useful for optimization, regression, etc.

Potential Projects: SDR Education

  • Refine Educational Materials

    • Enhanced labs coordinated with textbook

    • Comprehensive video/interactive tutorials

    • Orientation to collaborative development

  • “Teach the Teacher”

    • Workshops for faculty and in-house educators

  • University SDR development contest

  • Recruit and quickly bootstrap new employees, improve productivity

Potential Projects: SDR Rapid Prototyping Tools

  • Improved GUI

  • More powerful debugging

  • Enhanced collaborative development support

  • Support for DSPs, FPGAs (emulation & HW)

  • Support for commercial SCA frameworks

  • Support for/integration of GNU Radio

  • Reduce time to market, promote increased compatibility/portability

Potential Projects: SDR Research

  • Integration of FPGAs into SDR including dynamic reconfiguration

  • Integration of DSPs

  • Efficient use of multi-core platforms

  • Robust distributed signal processing in SDR networks

  • Enhanced framework support for cognition

  • Security

  • All crucial to next-generation SDRs

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