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Novel Design for High-Efficiency Millimeter-Wave Zero-Bias Detectors

Novel Design for High-Efficiency Millimeter-Wave Zero-Bias Detectors. Chun-Yen Huang Identification and Security Technology Center Industrial Technology Research Institute (ITRI), Taiwan National Chiao-Tung University, Taiwan chunyenhuang@itri.org.tw December 14, 2010. Outline. Motivation

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Novel Design for High-Efficiency Millimeter-Wave Zero-Bias Detectors

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  1. Novel Design for High-Efficiency Millimeter-Wave Zero-Bias Detectors Chun-Yen Huang Identification and Security Technology Center Industrial Technology Research Institute (ITRI), Taiwan National Chiao-Tung University, Taiwan chunyenhuang@itri.org.tw December 14, 2010 1

  2. Outline • Motivation • Background • Proposed Solution • Results • Conclusion 2

  3. Motivation • Background • Proposed Solution • Results • Conclusion 3

  4. Numerous equipments Handheld RF analyzers network analyzers Power meter Amplitude Modulation Sources: Agilent Inc.; Aaronia AG; Linear Technology; 4

  5. Motivation • Background • Proposed Solution • Results • Conclusion 5

  6. Basic Detector Circuit • Detector circuits are used to convert the AM microwave signals to baseband (or video) signals 6

  7. Motivation • Background • Proposed Solution • Results • Conclusion 7

  8. Zero-Bias detector with Novel Design • A Schottky diode in conjunction with the charge amplifier like, a common source configuration FET amplifier in zero bias operation • By integrating the time interval of the diode’s output current at the input gate terminal of the common source configuration FET, the accumulated charge creates a potential • Then the FET acts as a transconductance amplifier 8

  9. Zero-Bias detector with Novel Design (Cont.) Type I: Zero-bias detector with CS configuration FET • RF input power applied to the ZBD and is rectified into current, • The ZBD’s output current (refer to the low frequency component) IDC flowed into the combined capacitor (CRF+Cpg) • Then, the accumulated charge creates a potential on the input terminal of the CS FET amplifier • Finally, low pass filter (LPF) reads the amplified signals out at Vout. 9

  10. Zero-Bias detector with Novel Design (Cont.) Type II: Zero-bias detector with CG configuration FET • The ZBD’s output current charge at the input end of CG FET amplifier (CGA) is collected by the combined capacitor (CRF+Cps) in the source end of CGA • The charge storing is presented on the combined capacitor as well as the previous design 10

  11. Zero-Bias detector with Novel Design (Cont.) 2DEG in pHEMT to the Type II design • The depletion-mode HEMT forms the two-dimensional electron gas (2DEG) between AlGaAS and InGaAs layers though the gate bias is set zero • Once the potential which occurred by charge storing apply to the source • end of CGA, the current flow coincides in the 2DEG • Lead to the degradation of isolation 11

  12. Motivation • Background • Proposed Solution • Results • Conclusion 12

  13. Type I: Zero-bias detector with CS configuration FET Output Current V.S. Input Power Output currents at design Type I (red line), and in the Schottky diode only detector (blue line). 13

  14. Type I: Zero-bias detector with CS configuration FET Output Voltage V.S. Input Power Output voltages in design Type I (red line), and in the Schottky diode only detector (blue line). 14

  15. Type I: Zero-bias detector with CS configuration FET Isolation V.S. Frequency The improvement below 60 GHz is more apparent due to the influence by parasitics coupling between gate and drain at higher frequencies is more serious. Isolation of the design Type I (red line), and of Schottky diode only detector (blue line). 15

  16. Type II: Zero-bias detector with CG configuration FET Output Current V.S. Input Power Output currents at design Type II (red line), and in the Schottky diode only detector (blue line). 16

  17. Type II: Zero-bias detector with CG configuration FET Output Voltage V.S. Input Power Output voltages in design Type II (red line), and in the Schottky diode only detector (blue line). 17

  18. Type II: Zero-bias detector with CG configuration FET Isolation V.S. Frequency The isolation is not effective due to the loss in 2DEG conducting channel between drain and source is indelible. Isolation of the design Type II (red line), and of Schottky diode only detector (blue line). 18

  19. Motivation • Background • Proposed Solution • Results • Conclusion 19

  20. Conclusion • The design and simulation of high-efficiency millimeterwave zero-bias detectors in commercial 0.15m GaAs pseudomorphic HEMT process have been presented. • The computational estimations showed that the rectified current intensities in those two novel designs are both higher than that in Schottky diode only structures by four orders • Those results could be consistent with all the dynamic range of RF input power from -100 dBm to -35 dBm at 94 GHz. • The isolation between RF and DC ports is improved due to the insertion of FET. • The novel designs are capable of high integrated, low cost and easy to be implemented, particularly in the applications of millimeter-wave imaging, small signals detection and mixing. 20

  21. Thanks for your listening 21

  22. Q & A 22

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