Chapter 04 Tutorial Using StateCAD

1. Chapter 04Tutorial Using StateCAD

2. Objective • This tutorial will give you exposure to using StateCAD and VHDL • Using HDL Bencher and Modelsim for simulating the functional design • This tutorial shows you how to create, using StateCAD and VHDL, a simple sequence generator

3. Sequence Generator State Table

4. Sequence Generator State Diagram

5. Create a New Project

6. Enter a Name and Location for the Project 1 2 3

7. Select the Device and Design Flow for the Project

8. Create a New Source

9. Select State Diagram and Enter File Name 1 2 3

10. New Source Information

11. New Source Information

12. Next Step

13. Finish

14. Create a Blank StateCAD

15. State Machine Wizard: Draw State Machines Draw State Machines

16. Select the Appearance of the State Machine 1 2 3

17. Reset the State Machine 1 2

18. Setup Transitions

19. Placed Template State Diagram

20. Edit Conditions in the transition arrow State0State1 Left-Click

21. Output Wizard 1 2

22. Enter Constraint Value 1 2 3 4

23. Completed Transition

24. Modified State Diagram

25. Insert a New Transition 1 3 2

26. Enter Constraint Value 1 2 Left-Click 3 4

28. State2State1 2 3 4 1 Left-Click

29. Final State Diagram

30. Generate HDL

31. Optimize Outputs for Speed

32. Result Windows

33. StateCAD HDL

34. Create Test Bench (State Bench)

35. State Bench

36. Reset

37. Input CLK

38. Review Sequence Generator State Table

39. Summary Sequence Generator State Table • M=0, then State 02130…… • M=1, then State 01 0…… , State 20, and State 30.

40. Check M=0 Then DOUT 0,2,1,3(State 0,2,1,3)

41. Check M=1 Then DOUT 0, 1(State 0,1)

42. Check M=1 Then State2 State0 and State3State0

43. Questions and Answers