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Pentium Real Mode

STES Sinhgad Institute of Tech. & Science Dept. of Computer Engg. Pune-41. Pentium Real Mode. Prof. Mahendra Balkrishna Salunke Asst. Prof. Dept. of Computer Engg., STES SITS, Narhe, Pune-41. Avenue. What is real mode? Address translation in Real Mode. Registers used in Real Mode.

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Pentium Real Mode

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  1. STES Sinhgad Institute of Tech. & Science Dept. of Computer Engg. Pune-41 Pentium Real Mode Prof. Mahendra Balkrishna Salunke Asst. Prof. Dept. of Computer Engg., STES SITS, Narhe, Pune-41

  2. Avenue • What is real mode? • Address translation in Real Mode. • Registers used in Real Mode. • Instructions used in Real Mode. • Interrupt and Exception Handling Computer Engg. Dept. STES SITS Pune

  3. What is Real Mode? • The real-address mode of the Pentium processor runs programs written for the 8086, 8088, 80186, or 80188 processors, or for the real-address mode of Intel 286, Intel386, or Intel486 processors. Computer Engg. Dept. STES SITS Pune

  4. Address translation in Real Mode. • Same as 8086. • Linear Address range: 0 to 10FFEFh (1MB + Approx 64kb) • A20M# pin is used to mask bit A20 • As paging is not allowed this linear address will be used as physical address • Effective address can be of 32bit but should not exceed 65,535 Computer Engg. Dept. STES SITS Pune

  5. Registers used in Real Mode • All registers defined for 8086 plus FS, GS, debug registers, control registers, test registers, and floating-point unit registers. • Pentium processor offers an operand-size override prefix which enables access to 32-bit operands. Computer Engg. Dept. STES SITS Pune

  6. Instructions used in Real Mode. • Programs executing in real-address mode are able to take advantage of the new application oriented instructions added to the architecture with the introduction of the 80186, 80188, Intel 286, Intel386, Intel486, and Pentium processors. Computer Engg. Dept. STES SITS Pune

  7. Interrupt and Exception Handling • Interrupts and exceptions in real-address mode work much as they do on an 8086 processor. • Interrupts and exceptions call interrupt procedures through an interrupt vector table. • The location and size of the interrupt table depend on the contents of the IDTR register • After reset, the IDTR register contains a base address of 0 and a limit of 3FFH, • The LIDT instruction can be used in real-address mode to change the base and limit values in the IDTR register. Computer Engg. Dept. STES SITS Pune

  8. E-mail: msalunke@gmail.com URL: www.microsig.webs.com Happy Learning... Computer Engg. Dept. STES SITS Pune

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