Digital logic circuits
Download
1 / 56

Digital Logic Circuits - PowerPoint PPT Presentation


  • 456 Views
  • Updated On :

Digital Logic Circuits. Binary Logic and Gates Logic Simulation Boolean Algebra NAND/NOR and XOR gates Decoder fundamentals Half Adder, Full Adder, Ripple Carry Adder. Analog vs Digital. Analog Continuous Time Every time has a value associated with it, not just some times Magnitude

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'Digital Logic Circuits' - omer


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
Digital logic circuits l.jpg

Digital Logic Circuits

  • Binary Logic and Gates

  • Logic Simulation

  • Boolean Algebra

  • NAND/NOR and XOR gates

  • Decoder fundamentals

  • Half Adder, Full Adder, Ripple Carry Adder


Analog vs digital l.jpg
Analog vs Digital

  • Analog

    • Continuous

      • Time

        • Every time has a value associated with it, not just some times

      • Magnitude

        • A variable can take on any value within a range

      • e.g.

        • temperature, voltage, current, weight, length, brightness, color


Digital systems l.jpg
Digital Systems

Digital vs. Analog Waveforms

Digital:

only assumes discrete values

Analog:

values vary over a broad range

continuously



Analog vs digital5 l.jpg
Analog vs Digital

  • Digital

    • Discontinuous

      • Time (discretized)

        • The variable is only defined at certain times

      • Magnitude (quantized)

        • The variable can only take on values from a finite set

      • e.g.

        • Switch position, digital logic, Dow-Jones Industrial, lottery, batting-average


Analog to digital l.jpg
Analog to Digital

  • A Continuous Signal is Sampled at Some Time and Converted to a Quantized Representation of its Magnitude at that Time

    • Samples are usually taken at regular intervals and controlled by a clock signal

    • The magnitude of the signal is stored as a sequence of binary valued (0,1) bits according to some encoding scheme


Digital to analog l.jpg
Digital to Analog

  • A Binary Valued, B = { 0, 1 }, Code Word can be Converted to its Analog Value

  • Output of D/A Usually Passed Through Analog Low Pass Filter to Approximate a Continuous Signal

  • Many Applications Construct a Signal Digitally and then D/A

    • e.g., RF Transmitters, Signal Generators


Digital is ubiquitous l.jpg
Digital is Ubiquitous

  • Electronic Circuits based on Digital Principles are Widely Used

    • Automotive Engine/Speed Controllers

    • Microwave Oven Controllers

    • Heating Duct Controls

    • Digital Watches

    • Cellular Phones

    • Video Games


Why digital l.jpg
Why Digital?

  • Increased Noise Immunity

  • Reliable

  • Inexpensive

  • Programmable

  • Easy to Compute Nonlinear Functions

  • Reproducible

  • Small


Digital design process l.jpg
Digital Design Process

  • Computer Aided Design Tools

    • Design entry

    • Synthesis

    • Verification and simulation

    • Physical design

    • Fabrication

    • Testing



Representations for combinational logic l.jpg
Representations for combinational logic

  • Exclusive-or (XOR, EXOR, not-equivalence, ring-OR)

  • Algebraic symbol:

  • Gate symbol:

  • Truth tables

  • Graphical (logic gates)

  • Algebraic equations (Boolean)



Representations of a digital design l.jpg
Representations of a Digital Design

Truth Tables

tabulate all possible input combinations and their associated

output values

Example: half adder

adds two binary digits

to form Sum and Carry

Example: full adder

adds two binary digits and

Carry in to form Sum and

Carry Out

NOTE: 1 plus 1 is 0 with a

carry of 1 in binary


Representations of digital design boolean algebra l.jpg
Representations of Digital Design: Boolean Algebra

values: 0, 1

variables: A, B, C, . . ., X, Y, Z

operations: NOT, AND, OR, . . .

NOT X is written as X

X AND Y is written as X & Y, or sometimes X Y

X OR Y is written as X + Y

Deriving Boolean equations from truth tables:

Sum = A B + A B

Carry

0

0

0

1

A

0

0

1

1

B

0

1

0

1

Sum

0

1

1

0

OR'd together product terms

for each truth table

row where the function is 1

if input variable is 0, it appears in

complemented form;

if 1, it appears uncomplemented

Carry = A B


Representations of a digital design boolean algebra l.jpg
Representations of a Digital Design: Boolean Algebra

Another example:

Sum = A B Cin + A B Cin + A B Cin + A B Cin

Sum

0

1

1

0

1

0

0

1

Cout

0

0

0

1

0

1

1

1

A

0

0

0

0

1

1

1

1

B

0

0

1

1

0

0

1

1

Cin

0

1

0

1

0

1

0

1

Cout = A B Cin + A B Cin + A B Cin + A B Cin


Gate representations of a digital design l.jpg
Gate Representations of a Digital Design

most widely used primitive building block in digital system design

Standard

Logic Gate

Representation

Half Adder Schematic

Net: electrically connected collection of wires

Netlist: tabulation of gate inputs & outputs

and the nets they are connected to





Schematic for 4 bit alu l.jpg
Schematic for 4 Bit ALU

Invertor

ANDGate

EXORGate

ORGate


Simulation of 4 bit alu l.jpg

4

2

4

A

D

B

S

Simulation of 4 Bit ALU

if S=0 then D=B-A

if S=1 then D=A-B

if S=2 then D=A+B

if S=3 then D=-A


Elementary binary logic functions l.jpg
Elementary Binary Logic Functions

  • Digital circuits represent information using two voltage levels.

    • binary variables are used to denote these values

    • by convention, the values are called “1” and “0” and we often think of them as meaning “True” and “False”

  • Functions of binary variables are called logic functions.

    • AND(A,B) = 1 if A=1 and B=1, else it is zero.

      • AND is generally written in the shorthand A×B (or A&B or AÙB)

    • OR(A,B) = 1 if A=1 or B=1, else it is zero.

      • OR is generally written in the shorthand form A+B (or A|B or AÚB)

    • NOT(A) = 1 if A=0 else it is zero.

      • NOT is generally written in the shorthand form (or ØA or A)

  • AND, OR and NOT can be used to express all other logic functions.


Two variable binary logic functions l.jpg

EQUAL

NAND

NOR

OR

BÞA

EXOR

A

ONE

ZERO

AND

(BÞA)

B

A

(AÞB)

AÞB

B

A

B

1111

0001

0000

1000

1100

0100

0010

0111

0101

1010

1110

1101

1011

0011

1001

0110

0011

0101

Two Variable Binary Logic Functions

  • Can make similar truth tables for 3 variable or 4 variable functions, but gets big (256 & 65,536 columns).

  • Representing functions in terms of AND, OR, NOT.

    • NAND(A,B) = (A×B)

    • EXOR(A,B) = (A×B) + (A×B)


Basic logic gates l.jpg

Timing Diagram

X

X

AND Gate

X×Y

Y

Y

X

X×Y

OR Gate

X+Y

Y

X+Y

Inverter

X

X’

X’

Basic Logic Gates

  • Logic gates “compute” elementary binary functions.

    • output of an AND gate is “1” when both of its inputs are “1”, otherwise the output is zero

    • similarly for OR gate and inverter

  • Timing diagram shows how output values change over time as input values change


Multivariable gates l.jpg

A

A

B

B

C

C

D

E

F

Multivariable Gates

6 input OR Gate

3 input AND Gate

A+B+C+D+E+F

  • AND function on n variables is “1” if and only if ALL its arguments are “1”.

    • n input AND gate output is “1” if all inputs are “1”

  • OR function on n variables is “1” if and only if at least one of its arguments is “1”.

    • n input OR gate output is “1” if any inputs are “1”

  • Can construct “large” gates from 2 input gates.

    • however, large gates can be less expensive than required number of 2 input gates

A×B×C


Elements of boolean algebra l.jpg

A

B

C

B×C

A+B×C

00001111

00110011

01010101

00100010

00101111

A

B

A+B×C

C

Elements of Boolean Algebra

  • Boolean algebra defines rules for manipulating symbolic binary logic expressions.

    • a symbolic binary logic expression consists of binary variables and the operators AND, OR and NOT (e.g. A+B×C)

  • The possible values for any Boolean expression can be tabulated in a truth table.

  • Can define circuit forexpression by combininggates.


Schematic capture logic simulation l.jpg
Schematic Capture & Logic Simulation

wires

advancesimulation

gates

signalwaveforms

terminals

schematicentry tools

signalnames


Boolean functions to logic circuits l.jpg

A

A+B×C

(B×(C))

Boolean Functions to Logic Circuits

  • Any Boolean expression can be converted to a logic circuit made up of AND, OR and NOT gates.

    step 1: add parentheses to expression to fully define order of operations - A+(B×(C))

    step 2: create gate for “last” operation in expression

    gate’s output is value of expression

    gate’s inputs are expressions combined by operation

step 3: repeat for sub-expressions and continue until done

  • Number of simple gates needed to implement expression equals number of operations in expression.

    • so, simpler equivalent expression yields less expensive circuit

    • Boolean algebra provides rules for simplifying expressions


Basic identities of boolean algebra l.jpg
Basic Identities of Boolean Algebra

2. X×1 =X

4. X×0 = 0

6. X×X=X

8. X×X’ = 0

11. X×Y=Y×X

13. X×(Y×Z) = (X×Y)×Z

15. X+(Y×Z) =(X+Y)×(X+Z)

17. (X×Y)’ = X+Y

1. X + 0 =X

3. X + 1 = 1

5. X + X=X

7. X + X’ = 1

9. (X’)’ =X

10. X + Y=Y + X

12. X+(Y+Z) = (X+Y)+Z

14. X(Y+Z) =X×Y + X×Z

16. (X+ Y)=X×Y

commutative

associative

distributive

DeMorgan’s

  • Identities define intrinsic properties of Boolean algebra.

  • Useful in simplifying Boolean expressions

  • Note: 15-17 have no counterpart in ordinary algebra.

  • Parallel columns illustrate duality principle.


Verifying identities using truth tables l.jpg

X+(Y×Z) =(X+Y)×(X+Z)

(X+ Y)=X×Y

XYZ

Y×Z

X+(Y×Z)

X+Y

X+Z

(X+Y)×(X+Z)

XY

(X+ Y)

X×Y

00

1

1

000

0

0

0

0

0

0

01

0

0

1

0

0

0

001

0

10

0

0

0

010

0

1

0

0

11

0

1

011

1

1

1

1

1

1

1

100

0

1

1

101

0

1

1

1

0

110

1

1

1

1

1

111

1

1

1

1

Verifying Identities Using Truth Tables

  • Can verify any logical equation with small number of variables using truth tables.

  • Break large expressions into parts, as needed.



Demorgan s laws for n variables l.jpg
DeMorgan’s Laws for n Variables

  • We can extend DeMorgan’s laws to 3 variables by applying the laws for two variables.

    (X + Y + Z)=(X+ (Y + Z))- by associative law

    =X×(Y + Z)- by DeMorgan’s law

    =X×(Y×Z) - by DeMorgan’s law

    = X×Y×Z- by associative law

    (X×Y×Z)=(X×(Y×Z))- by associative law

    =X+ (Y×Z) - by DeMorgan’s law

    =X+ (Y+ Z)- by DeMorgan’s law

    = X+ Y+ Z- by associative law

  • Generalization to n variables.

    • (X1 + X2 + × × × + Xn)=X1×X2× × × Xn

    • (X1×X2× × × Xn)=X1 + X2 + × × × + Xn


Simplification of boolean expressions l.jpg

X

Y

Z

by identity 14

F=XY(Z +Z)+XZ

by identity 7

X

Y

F=XY×1+XZ =XY +XZ by identity 2

X

Z

Y

Z

Simplification of Boolean Expressions

F=XYZ+XYZ+XZ


The duality principle l.jpg
The Duality Principle

  • The dual of a Boolean expression is obtained by interchanging all ANDs and ORs, and all 0s and 1s.

    • example: the dual of A+(B×C)+0 is A×(B+C)×1

  • The duality principle states that if E1 and E2 are Boolean expressions then

    E1= E2 dual(E1)=dual(E2)

    where dual(E) is the dual of E. For example,

    A+(B×C)+0 = (B×C)+D  A×(B+C)×1 = (B+C)×D

    Consequently, the pairs of identities (1,2), (3,4), (5,6), (7,8), (10,11), (12,13), (14,15) and (16,17) all follow from each other through the duality principle.


The consensus theorem l.jpg
The Consensus Theorem

Theorem. XY + XZ +YZ = XY + XZ

Proof. XY + XZ +YZ = XY + XZ + YZ(X + X) 2,7

= XY + XZ + XYZ + XYZ 14

= XY + XYZ + XZ + XYZ 10

= XY(1 + Z)+ XZ(1 + Y) 2,14

= XY + XZ 3,2

Example. (A + B)(A+ C) = AA+ AC + AB + BC

= AC + AB + BC

= AC + AB

Dual. (X + Y)(X + Z)(Y + Z) = (X + Y)(X + Z)


Taking the complement of a function l.jpg
Taking the Complement of a Function

Method 1. Apply DeMorgan’s Theorem repeatedly.

(X(YZ+ YZ)) = X+ (YZ+ YZ)

= X + (YZ)(YZ)

= X+ (Y + Z)(Y+ Z)

Method 2. Complement literals and take dual

(X(YZ+ YZ))= dual(X(YZ + YZ))

= X+ (Y + Z)(Y+ Z)


Sum of products form l.jpg
Sum of Products Form

  • The sum of products is one of two standard forms for Boolean expressions.

    sum-of-products-expression = term+term ... +term

    term = literal×literal×××× ×literal

    Example. XYZ + XZ + XY + XYZ

  • A minterm is a term that contains every variable, in either complemented or uncomplemented form.

    Example. in expression above, XYZ is minterm, but XZ is not

  • A sum of minterms expression is a sum of products expression in which every term is a minterm

    Example.XYZ + XYZ + XYZ + XYZ is sum of minterms expression that is equivalent to expression above


Product of sums form l.jpg
Product of Sums Form

  • The product of sums is the second standard form for Boolean expressions.

    product-of-sums-expression = s-term×s-term ... ×s-term

    s-term = literal+literal+××× +literal

    Example. (X+Y+Z )(X+Z)(X+Y)(X+Y+Z)

  • A maxterm is a sum term that contains every variable, in complemented or uncomplemented form.

    Example. in exp. above, X+Y+Z is a maxterm, but X+Z is not

  • A product of maxterms expression is a product of sums expression in which every term is a maxterm

    Example.(X+Y+Z )(X+Y+Z)(X+Y+Z)(X+Y+Z)is product of maxterms expression that is equivalent to expression above


Nand and nor gates l.jpg

X

X

NAND Gate

NOR Gate

(X+Y)

(X×Y)

Y

Y

=

=

=

=

NAND and NOR Gates

  • In certain technologies (including CMOS), a NAND (NOR) gate is simpler & faster than an AND (OR) gate.

  • Consequently circuits are often constructed using NANDs and NORs directly, instead of ANDs and ORs.

  • Alternative gate representations makes this easier.


Exclusive or and odd function l.jpg

Alternative Implementation

A

EXOR gate

A

AB+AB

B

B

Exclusive Or and Odd Function

  • The odd function on n variables is 1 when an odd number of its variables are 1.

    • odd(X,Y,Z) = XYZ+ XYZ + XYZ + XYZ = X Y Z

    • similarly for 4 or more variables

  • Parity checking circuits use the odd function to provide a simple integrity check to verify correctness of data.

    • any erroneous single bit change will alter value of odd function, allowing detection of the change

  • The EXOR function is defined by AB = AB + AB.


Positive and negative logic l.jpg

X

X

X+Y

X×Y

Y

Y

Positive and Negative Logic

  • In positive logic systems, a high voltage is associated with a logic 1, and a low voltage with a logic 0.

    • positive logic is just one of two conventions that can be used to associate a logic value with a voltage

    • sometimes it is more convenient to use the opposite convention

  • In logic diagrams that use negative logic, a polarity indicator is used to indicate the correct logical interpretation for a signal.

  • Circuits commonly use a combination of positive and negative logic.





Decoder fundamentals l.jpg
Decoder Fundamentals

  • Route data to one specific output line.

  • Selection of devices, resources

  • Code conversions.

  • Arbitrary switching functions

    • implements the AND plane

  • Asserts one-of-many signal; at most one output will be asserted for any input combination


Encoding l.jpg
Encoding

Binary

Decimal Unencoded Encoded

0 0001 00

1 0010 01

2 0100 10

3 1000 11

Note: Finite state machines may be unencoded ("one-hot")

or binary encoded. If the all 0's state is used, then

one less bit is needed and it is called modified

one-hot coding.


Why encode a logarithmic relationship l.jpg
Why Encode?A Logarithmic Relationship


2 4 decoder l.jpg

A

B

1 1

1 0

0 1

00

Y

Y

Y

Y

E Q 3

E Q 2

E Q 1

E Q 0

AND 2

A

B

AND 2 A

A

B

AND 2 A

D 0

A

B

AND 2 B

D 1

2:4 Decoder

What happens when the inputs goes from 01 to 10?


2 4 decoder with enable l.jpg

A

B

C

A

B

C

A

B

C

A

B

C

1 1

1 0

0 1

00

Y

Y

Y

Y

E Q 3

E Q 2

E Q 1

E Q 0

AND 3

AND 3 A

AND 3 A

D 0

D 1

ENABLE

AND 3 B

2:4 Decoder with Enable

1 1

1 0

0 1

00


2 1 multiplexer l.jpg

A

B

A

B

A

S

B

Y X1

Y X2

A

B

Y

Y

2:1 Multiplexer





Full adder with exor and nand l.jpg

One-bit Full Adder (FA)

3 inputs: A, B, C

2 outputs: S, Co

Truth table:

Schematic View:

cell-based approach

Full Adder – with EXOR and NAND

A, B, C S, Co

0, 0, 0 0, 0

0, 0, 1 1, 0

0, 1, 0 1, 0

0, 1, 1 0, 1

1, 0, 0 1, 0

1, 0, 1 0, 1

1, 1, 0 0, 1

1, 1, 1 1, 1



ad