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Other Computer Organizations. RISC. What is RISC. Pronounced risk, acronym for r educed i nstruction s et c omputer , a type of microprocessor that recognizes a relatively limited number of instructions.

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What is risc
What is RISC

  • Pronounced risk, acronym for reduced instruction set computer, a type of microprocessor that recognizes a relatively limited number of instructions.

  • Until the mid-1980s, the tendency among computer manufacturers was to build increasingly complex CPUs that had ever-larger sets of instructions.


  • Since the emergence of RISC computers, conventional computers have been referred to as CISCs (complex instruction set computers).

Different opinions
Different Opinions

  • There is still considerable controversy among experts about the ultimate value of RISC architectures.

  • Its proponents argue that RISC machines are both cheaper and faster, and are therefore the machines of the future.

  • Skeptics note that by making the hardware simpler, RISC architectures put a greater burden on the software.

  • They argue that this is not worth the trouble because conventional microprocessors are becoming increasingly fast and cheap anyway.

Well accepted opinions
Well Accepted Opinions

  • To some extent, the argument is becoming moot because CISC and RISC implementations are becoming more and more alike.

  • Many of today's RISC chips support as many instructions as yesterday's CISC chips.

  • And today's CISC chips use many techniques formerly associated with RISC chips.

Sparc and ultra sparc cpus

  • Scalable Processor ARChitecture

  • SPARC were designed for handling of alphanumeric data and running programs like word processor and spreadsheets.

  • The UltraSPARC was designed for handling images, audio, video, and multimedia in general.

  • The later version of UltraSPARC III, IIIi, IV

Architecture of ultrasparc
Architecture of UltraSPARC

  • 64-Bit SPARC architecture

  • VIS Instruction Set

  • Transistor Count: 11 million logic, 12 million RAM, 6 million miscellaneous

  • 4-way superscalar

  • 14-stage non-stable pipeline

Process technology
Process Technology

  • CMOS .13 micron process

  • 1368 pin flip-chip ceramic Land Grid Array (LGA)

Cache memories
CACHE Memories

  • L1 Cache

  • 64 KB 4-way data

  • 32 KB 4-way instruction

  • 2 KB Write, 2 KB Prefetch

  • L2 Cache

  • Up to 8 MB External

  • On-chip controller and address tags


  • MP scalability: Over 1000 CPUs/system.


  • Max Memory -- 16 GB memory subsystem per processors Memory Controller

  • On-chip memory controller capable of addressing up to 16 GB of main memory at 2.4 GB/s


  • Power Consumption Power Dissipation: 53 watts at 1.2 GHz1.6 volt core voltage

High performance
High Performance

  • Feature:

  • 64-bit data addressing, four-way superscalar,

  • 14 stage non-stalling pipeline,

  • speculative execution,

  • on-chip memory controller and L2 tags,

  • up to 8 MB external L2 cache,

  • advanced process technology including copper interconnects,

  • low-k interlayer dielectric.

Ultrasparc vi

  • Architecture :

  • Chip Multithreading (CMT) processor with two threads per processor

  • Based on two UltraSPARC III pipelines

  • 64-Bit SPARC architecture VIS Instruction Set

  • 66 million transistor count

  • 4-way superscalar

  • 14-stage nonstalling pipeline

Other specifications
Other Specifications

  • Clock Frequency : 1.05 - 1.35 GHz

  • L1 Cache (per pipeline) :

  • 64 KB 4-way data

  • 32 KB 4-way instruction

  • 2 KB Write, 2 KB Prefetch

  • L2 Cache :

  • 16 MB external (exclusive access to 8 MB per pipeline)

  • On-chip controller and address tags

Other specs cont
Other Specs Cont…

  • Scalability : Multiprocessing scalability with architecture support for over 1000 processors/system.

  • Memory Controller : On-chip memory controller capable of addressing up to 16 GB of main memory at 2.4 GB/s.


  • System : Deployed in:

  • Sun Fire V490 server

  • Sun Fire V890 server

  • Sun Fire E2900 server

  • Sun Fire E4900 server

  • Sun Fire E6900 server

  • Sun Fire E20K server

  • Sun Fire E25K server


  • SUN Microsystems first suggested the idea in mid 1990’s and it become popular very soon.

  • The JVM has a memory of 32-bits word and 226 instructions that machine can executes.

  • Most of the instructions are simple, but a few are quite complex, requiring multiple memory cycles.

Compiler and interepreter for java
Compiler and Interepreter for JAVA

  • To make the JAVA program potable, SUN wrote a compiler that compiles JAVA to JVM. It also wrote a JVM interpreter to execute Java binary programs.

  • The interpreter was written in C language.

  • Therefore, Java program can be compiled and executed on any machine with a C compiler.

Applets in java
Applets in Java

  • The little Java binary programs associated with World Wide Web pages.

  • Many of these applets provide animation and sound.

Jit just in time compiler
JIT (Just In Time) Compiler

  • To run a Java program requires a JVM-to-machine language –compiler inside the browser and being able to activate it on-the-fly as needed.

  • It is called JIT compiler.

Jvm chips picojava ii
JVM Chips – PicoJava II

  • picoJava™-II Specification

  • Characteristics:

  • 32-bit processor

  • High speed, direct execution of Java byte codes

  • Supports legady C/C++code

  • 6-stage pipeline

  • Instruction folding-up to 4 instructions issued in parallel

  • Instruction Cache: 0-16 Kbyte  Data Cache: 0-16 Kbyte

Picojava chip
picoJava Chip

  • A low-cost RISC microprocessor dedicated to executing Java -based bytecodes without the need for a interpreter or JIT compiler.

  • picoJava directly executes the JavaVirtual Machine instruction set.

  • As a result, Java software applications are up to 3 times smaller in code size and up to 5 times faster--thus reducing memory requirements--and 20 times faster than Java interpreters running on standard CPU s.


  • A Bit of History

  • The Java programming language is a general-purpose object-oriented concurrent language.

  • Its syntax is similar to C and C++, but it omits many of the features that make C and C++ complex, confusing, and unsafe.

  • The Java platform was initially developed to address the problems of building software for networked consumer devices.

Main features
Main Features to allow secure delivery of software components.

  • The popularization of the World Wide Web made these attributes much more interesting.

  • The Internet demonstrated how media-rich content could be made accessible in simple ways.

  • Web browsers such as Mosaic enabled millions of people to roam the Net and made Web surfing part of popular culture.

  • At last there was a medium where what you saw and heard was essentially the same whether you were using a Mac, PC, or UNIX machine, and whether you were connected to a high-speed network or a slow modem.

  • A Web browser incorporating the Java platform is no longer limited to a predetermined set of capabilities.

  • Visitors to Web pages incorporating dynamic content can be assured that their machines cannot be damaged by that content.

  • Programmers can write a program once, and it will run on any machine supplying a Java runtime environment.

  • Web enthusiasts soon discovered that the content supported by the Web's HTML document format was too limited.

  • HTML extensions, such as forms, only highlighted those limitations, while making it clear that no browser could include all the features users wanted.

  • Extensibility was the answer.

Java instructions set
JAVA Instructions Set by the Web's HTML document format was too limited.

  • The arithmetic instructions are as follows:

  • Add: iadd, ladd, fadd, dadd.

  • Subtract: isub, lsub, fsub, dsub.

  • Multiply: imul, lmul, fmul, dmul.

  • Divide: idiv, ldiv, fdiv, ddiv.

  • Remainder: irem, lrem, frem, drem.

  • Negate: ineg, lneg, fneg, dneg.

  • Shift: ishl, ishr, iushr, lshl, lshr, lushr.

  • Bitwise OR: ior, lor.

  • Bitwise AND: iand, land.

  • Bitwise exclusive OR: ixor, lxor.

  • Local variable increment: iinc.

  • Comparison: dcmpg, dcmpl, fcmpg, fcmpl, lcmp.