Linear time algorithm to find all relocation positions for euv defect mitigation
Download
1 / 21

Linear Time Algorithm to Find All Relocation Positions for EUV Defect Mitigation - PowerPoint PPT Presentation


  • 81 Views
  • Uploaded on

Linear Time Algorithm to Find All Relocation Positions for EUV Defect Mitigation. Yuelin Du, Hongbo Zhang, Qiang Ma and Martin D. F. Wong ASPDAC‘13. Outline. Introduction Problem formulation Algorithm Experimental results Conclusion. Introduction.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about ' Linear Time Algorithm to Find All Relocation Positions for EUV Defect Mitigation' - ojal


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
Linear time algorithm to find all relocation positions for euv defect mitigation

Linear Time Algorithm to Find All Relocation Positions for EUV Defect Mitigation

Yuelin Du, Hongbo Zhang, Qiang Ma and Martin D. F. Wong

ASPDAC‘13


Outline
Outline EUV Defect Mitigation

  • Introduction

  • Problem formulation

  • Algorithm

  • Experimental results

  • Conclusion


Introduction
Introduction EUV Defect Mitigation

  • With the current VLSI technology shrinking to sub-20nm, EUV lithography has become a leading candidate to replace the 193nm technology.

  • But, the absence of defect-free blanks in EUV mask fabrication,a methodology that is able to deal with defective blanks will be required


Introduction1
Introduction EUV Defect Mitigation


Introduction2
Introduction EUV Defect Mitigation


Problem formulation
Problem EUV Defect Mitigationformulation

  • Maximize the number of valid dies within the exposure field.


Problem formulation1
Problem formulation EUV Defect Mitigation

  • Find the all feasible regions.


Algorithm
Algorithm EUV Defect Mitigation

  • Blank Region Partition

    • Blank Region with No Effective Defect

    • Blank Region with Single Effective Defect

    • Blank Region with Multiple Effective Defect


Blank region partition
Blank Region EUV Defect MitigationPartition

  • no part of the die can be shifted outside the exposurefield

  • Each defect has a unique impact range


Blank region with no effective defect
Blank Region with No Effective EUV Defect MitigationDefect

  • The bottom left corner of the die is located within this region, no defect will locate within the die area, and hence all defect impact is completely mitigated.


Blank region with single effective defect
Blank Region with Single EUV Defect MitigationEffective Defect

  • Step 1. Impacted Feature Extraction

  • Step 2. Impacted Feature Shrinking

  • Step 3. Shrunk Die Area Rotation and Shift


Impacted feature extraction
Impacted Feature Extraction EUV Defect Mitigation

  • The width/height of 3’is equal to the width/height of 3 plus the width/height of the defect.

  • Impacted Feature: F2,F3


Impacted feature shrinking
Impacted Feature Shrinking EUV Defect Mitigation

  • In the second step, the impacted features and the impacted die area 3are shrunk by the size of the effective defect.


Shrunk die area rotation and shift
Shrunk Die Area Rotation and Shift EUV Defect Mitigation

  • Therefore, the shrunk features in 3’’and the feasible regions in 3 are diagonally symmetric.


Blank region with multiple effective defect
Blank Region with Multiple Effective EUV Defect MitigationDefect

  • The objective is to find the feasible regions to locate the die where all defects are covered by features simultaneously.

  • We first consider each defect separately

  • And the sets of feasible regions are intersected to obtain the final feasible region


Time complexity analysis
Time Complexity Analysis EUV Defect Mitigation

  • n: the number of features in the die.


Improved strategy for layout intersection
Improved Strategy for EUV Defect MitigationLayout Intersection


Experimental result
Experimental result EUV Defect Mitigation

  • We implement our algorithm using C++ on a workstation with an Intel Xeon E5620 2.40GHz CPU and 36GB memory

  • Then we carry out our experiments with a 11nm design

  • The defects size form 50nm to 200nm

  • The size of the exposure field is 10.4cm by 13.2cm.


Experimental results
Experimental EUV Defect Mitigationresults


Experimental results1
Experimental EUV Defect Mitigationresults


Conclusion
Conclusion EUV Defect Mitigation

  • In this paper we propose an efficient algorithm to find all layout relocation positions to place a valid die on a defective blank for defect mitigation.

  • By simple parallelism, the efficiency can be further improved.


ad