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LPSAT: A Unified Approach to RTL Satisfiability

LPSAT: A Unified Approach to RTL Satisfiability. Zhihong Zeng, Priyank Kalla, Maciej Ciesielski Dept. of Electrical & Computer Engineering University of Massachusetts, Amherst. Motivation. Support test pattern generation for functional simulation.

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LPSAT: A Unified Approach to RTL Satisfiability

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  1. LPSAT: A Unified Approach to RTL Satisfiability Zhihong Zeng, Priyank Kalla, Maciej Ciesielski Dept. of Electrical & Computer Engineering University of Massachusetts, Amherst DATE-2001

  2. Motivation Support test pattern generation for functional simulation • Given an RTL design specification and a coverage metric, reach predefined coverage goal by simulation • code coverage, transactions, etc. • Functional simulation • Manual directed test • Random directed test • Deterministic test pattern generation DATE-2001

  3. Functional Validation - typical scenario 100 % Deterministic tests ? 100.0 95 % Normalized verification test cycles Coverage Pseudo-random directed tests 1.0 50 % Manual directed tests Test development time DATE-2001

  4. Outline • SAT problem in our context • Deterministic test pattern generation • Designs with mixed arithmetic and logic blocks • Previous work • Our uniform approach: LPSAT • Create linear models for both domains • Handling wide operators • Complexity issues • Experimental results • Conclusions and future work DATE-2001

  5. + < A=? B=? * 0 extract 1 out x=? c=? a=? b=? Functional Test Generation • Deterministic test pattern generation • Formulate SAT problem for a complex combinational design • Solve SAT: find a set of satisfying assignment Module DUT … always @ (clk) begin if (A+B < B*C) out = x; else out = a & b end DATE-2001

  6. x  y symbolic trace 5 Output Requirements • In SAT, where do the output requirements come from ? • Combinational equivalence check • Output of a miter to be set to a constant • Directed tests (manual, random) • Known or generated randomly within a range • Deterministic tests • It may correspond to a state that must be reached, or • It represents a branch condition that must be exercised Example: If branch (x < 5) has not been taken, generate a test for it Solve SAT for y=1 DATE-2001

  7. + < * 0 1 Structure of RTL Descriptions • Complex designs contain • Arithmetic blocks • Boolean logic • mixed logic • Existing SAT solvers cannot efficiently handle high-level, arithmetic operators DATE-2001

  8. A 0 C B 1 s A C + -- * / B A c < B a c b Types of Operators • Mixed-level blocks • MUX • Arithmetic blocks • (symbolic, word-level operators) • ADD, SUB • MULT, DIV • comparators • shifters, etc • Boolean logic (bit-level) • logic gates DATE-2001

  9. Boolean logic: Boolean equations CNF formulas BDD a c b c a b 1 0 Modeling: Boolean Domain c = a & b (a+c’)(b+c’)(a’+b’+c)=1 DATE-2001

  10. Arithmetic blocks: Linear constraints A + -- * / C B 1 if D < E 0 otherwise s = D < s E Modeling: Arithmetic and Mixed Logic • Mixed logic: • Integer constraints C =A + B A < 255 • Conclusion: inconsistent representation of different domain (Boolean and arithmetic) DATE-2001

  11. Modeling and Solving SATPrevious Approaches • Map entire design onto BDD (BSAT, …) • Sometimes fast for UN-SAT instances • BDD blow-up • Map entire design to CNF (GRASP, SATO,…) • Any generic CNF-based solver can be used • Representation is large, structural information is lost • Map Boolean logic onto CNF, arithmetic operators onto linear equations (HSAT) • Scales with design size • Solved by passing constraints from CNF to LP domain • Inconsistent domains, explicit backtracking needed DATE-2001

  12. Modeling and Solving SAT for Mixed Domains • Our approach: • Represent both domains in a unified format (linear constraints) • Scalable with design size • Solve Mixed Integer Linear Program (MILP) • Constraint propagation between arithmetic and logic parts is implicit in MILP solver DATE-2001

  13. A + -- * / C B D - E - L (1-s) < 0 D - E + L s 0 X 1 Z Z – X – L (1-s)  0 X – Z – L (1-s)  0 Z – Y – L s 0 Y – Z – L s 0 Y 0 s D < s E LP Modeling:Arithmetic and Mixed Operators C =A + B A  255 A,B,C ..,Y – symbolic variables; s = binary variable; L = large constant DATE-2001

  14. Expand operand A A = A0 + 2 A1 + … + 2 n-1 An-1 Keep operand B as one variable Represent result in terms of partial products Pi C = P0 + 2 P1 + … + 2 n-1 Pn-1 for i = 1, …, n-1: Pi – L Ai 0 Pi – B + L(1-Ai)  0 0  Pi  B where L  A,B An-1 A0 Ai  B A P0 = A0 B * C =A * B B P1 = A1 B ……….. Pn-1=An-1B LP Modeling: Non-linear equations DATE-2001

  15. a c b a c a c b c  a c  b c  a+b-1 c  0 c  a c  b c  a + b c  1 LP Modeling: Boolean Logic c = 1 - a DATE-2001

  16. AH > 28 bits BH s == 28 bits A > 56 bits s B > 28 bits AL BL LP Modeling:Wide Arithmetic Operators • Integral resolution problem associated with LP solvers limit the largest integer number (~ 28 bits) • Decompose wide arithmetic operators by introducing Boolean logic DATE-2001

  17. A + D < B s E * Z X 1 C 0 Y Partitioning the Design • Partition design into arithmetic + Boolean domains • Word-level signals: B, D, E, X, Z • Word-level signals with (partial) bit-level expansion: A, C, Y • Y = Y[1] + 2*Y[2] + 4*Y[3] + … • Single-bit Boolean • signals: s DATE-2001

  18. … … 147 + integer integer 0/1 continuous MILP Solver - Efficiency Issues • Not all integer variables need to be declares as int • Only IO signals defined as integer variables • Internal signals left as bounded continuous variables; they will automatically be integer in the solution • Ordering of 0/1 integer variables for MILP • Decision variables on top DATE-2001

  19. * A D + + < < B s E Z * X 1 C 0 A[..] Y[..] 1 C[..] 0 LPSAT - example D = A + B E = B * C (linearized) 0  A,B,C,D  255 0  E  65535 D - E - L (1-s) < 0 D - E + L s  0 Z – X – L (1-s)  0 X – Z – L (1-s)  0 Z – Y – L s  0 Y – Z – L s  0 A[..] , C[..] ,Y[..] = Boolean vectors A,B,C,D,E,X,Z = continuous variables s = decision variable (0,1) Y[k]  A[k], C[k] Y[k]  A[k] + C[k] – 1 Y[k]  0 DATE-2001

  20. Results – test cases • M13 – 13-bit multipliers (sat, non) • M16 – 16-bit multipliers, decomposed (sat, non) • Square - compute Z2 = X2 + Y2, 16-bit variables • Quadratic - solve X2 = a X + b for16-bit X • Linear-k - k-wide chain of comparators (k=40, 90), simple structure, large # inputs (over 1200) • Gcd-k - sequential circuit, 24-bit gcd unrolled k=20, 40 time frames • Mdpe - multiplier feeding a dynamic priority encoder, taken from realistic design DATE-2001

  21. Experimental Results DATE-2001

  22. Conclusions and Future Work • LPSAT pros and cons: • Mixed arithmetic and Boolean: • datapaths, arithmetic circuits • Not efficient, if contains large Boolean blocks • Applications of LPSAT • SAT-based formal verification • Automatic functional test generation • Constrained/directed random simulation • High-level ATPG • Computational efficiency • Generic (CPLEX) or specialized LP solver ? • New directions • Constraint programming DATE-2001

  23. * D = A + B E = B * C (macro) 0  A,B,C,D  255 0  E  65535 A D + + < < B s E D  E  s = 1 D  E  s = 0 Z * X 1 C 0 s = 1  Z = X s = 0  Z = Y[k] A[..] Y[..] 1 C[..] 0 A[k] = 0  Y[k] = 0 C[k] = 0  Y[k] = 0 (A[k] =1 & C[k] = 1)  Y[k] = 1 Constraint Programming - example A[..] , C[..] ,Y[..] = Boolean vectors A,B,C,D,E,X,Z = domain variables s = integer variable (0,1) DATE-2001

  24. Challenges • Handling sequential designs, symbolic traces • Output relations for symbolic variables (data, states, internal nodes) over k time frames • Symbolic trace solver (deterministic SAT): • Creates symbolic variables over k time frames • Compute symbolic values for inputs in each time frame • How to model sequential traces ? • Traces can be very large, combinational SAT cannot handle it efficiently DATE-2001

  25. Testcase LPSAT CNF-SAT BSAT # constr CPU time # literals # clauses SATO CPU time GRASP CPU time CPU time M13*13(sat) 68 0.04 7146 16704 2.51 187.24 137 M13*13(non) 68 0.60 7146 16704 12.12 1355.8 520 M16*16(sat) 149 44.09 10590 24720 722.35 2819.3 >3600 M16*16(non) 149 2.34 10590 24720 132.12 >3600 >3600 Square(1) 701 >3600 33119 77361 >3600 1344 >3600 Square(0) 701 0.96 33119 77361 >3600 >3600 >3600 Quadratic 469 0.05 30759 72015 10.68 14.38 923.8 Linear(1) 950 0.37 16899 36914 5.01 2.98 >3600 Linear(2) 2749 1.34 35683 77887 1.27 6.73 >3600 Gcd20 542 0.03 50451 117785 >3600 >3600 >3600 Gcd40 1062 0.08 106423 248449 >3600 >3600 >3600 Mdpe(1) 2933 1.12 12245 29560 75.2 572.27 >3600 Mdpe(2) 3673 8.98 12731 30851 4.4 59.1 >3600 Results - table DATE-2001

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