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Effects of Switched-Bias Annealing on Charge Trapping in HfO 2 high-  Gate Dielectrics

X. J. Zhou, a D. M. Fleetwood, a L. Tsetseris, b R. D. Schrimpf, a S. T. Pantelides b a Department of Electrical Engineering and Computer Science, Vanderbilt University b Department of Physics and Astronomy, Vanderbilt University

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Effects of Switched-Bias Annealing on Charge Trapping in HfO 2 high-  Gate Dielectrics

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  1. X. J. Zhou,a D. M. Fleetwood,a L. Tsetseris,b R. D. Schrimpf,a S. T. Pantelidesb a Department of Electrical Engineering and Computer Science, Vanderbilt University b Department of Physics and Astronomy, Vanderbilt University Supported in part by Air Force Office of Scientific Research through the MURI program and the US Navy Effects of Switched-Bias Annealing on Charge Trapping in HfO2 high- Gate Dielectrics 2006 MURI Annual Review

  2. Motivation Experimental results Switched bias annealing after X-ray radiation Switched bias annealing after Constant Voltage Stress (CVS) Model of device response based on Metastable electron traps near interface (Vot) Primarily after radiation exposure Proton transport & reaction (Vit) After irradiation or CVS Additional defect growth during longer anneal cycles Outline 2006 MURI Annual Review

  3. High- dielectrics are promising candidates for future commercial and space electronics. At last year’s IEEE NSREC, we reported more degradation (very large threshold voltage shifts) when irradiation and bias temperature stressing (BTS) were combined than when the two separate effects were assessed independently and added. Charge trapping properties of high- dielectrics are not well understood – more insight is needed in advance of their potential use in manufacturing. General Motivation 2006 MURI Annual Review

  4. Specific Motivation (from last year’s NSREC) Worst case for Circuit response: pMOS devices irradiated “off” and annealed “on • Doses: 1 Mrad(SiO2); 0, ±2 MV/cm • BTS: 10 min; ±2 MV/cm; 75ºC Zhou, Fleetwood, Felix, Gusev, and D’Emic, TNS, 52 (6),2231, 2005 2006 MURI Annual Review

  5. Devices Al/SiOxNy+HfO2/p-Si MOS caps EOT = 2.1 nm Irradiation or constant voltage stress (CVS) Rad: 10-keV X-rays; ~ 500 rad(SiO2)/s to 1 Mrad(SiO2); Eox= 2MV/cm CVS: Eox = – 3.6 MV/cm; t = 1200s; T=25ºC Switched-Bias annealing 25ºC to 150ºC Eox = ± 2 MV/cm alternating Typical anneal time: 10 min Al HfO2 (6.8 nm) Oxynitride (1.0 nm) Si Experimental details ∆Vot and ∆Vit (flatband to midgap) estimated by midgap method of Winokur et al., IEEE TNS 31, 1453 (1984) 2006 MURI Annual Review

  6. Reversibility observed in ∆Vot after irradiation,during switched-bias anneals at 50ºC Rad: 1 Mrad (SiO2); 2 MV/cm Anneals: ±2 MV/cm, 50C •  Vot increases during NBTS and decreases during PBTS • Metastably trapped electrons near interface contribute to reversibility of Vot 2006 MURI Annual Review

  7. -V +V Al + + HfO2 (6.8 nm) + + _ _ + + _ + _ + + + _ _ SiOxNy(1.0 nm) _ _ Si Dominant Mechanism: ∆Vot Electrons move out of oxide during NBTS Electrons pulled back into oxide during PBTS 2006 MURI Annual Review

  8. Vot reversibility increases with annealing temperature Rad: 1 Mrad (SiO2); 2 MV/cm Anneals: ±2 MV/cm • Pure electron tunneling should not depend strongly on temperature • Other mechanisms must be contributing (e.g., H+ motion), as we now show 2006 MURI Annual Review

  9. Similar reversibility also observed for Vit Rad: 1 Mrad (SiO2); 2 MV/cm Anneals: ±2 MV/cm • Vit increases during NBTS, and decreases during PBTS • Process not due to normal two-stage Vit buildup due to H+ release in oxide • More consistent with Vit buildup seen in NBTI experiments 2006 MURI Annual Review

  10. Si Si Si Si Candidate Mechanism (Oversimplified)[structural reconfiguration likely also occurs; not just H+ motion] -V +V Al HfO2 (6.8 nm) H+ SiOxNy(1.0 nm) H+ Si Protons depassivate Si-H bond: Vit↑, Vot↑ Protons passivate Si-H bond:Vit↓, Vot↓ 2006 MURI Annual Review

  11. Vit increases with increasing anneal temperature Rad: 1 Mrad (SiO2); 2 MV/cm Anneals: ±2 MV/cm • More than simple reversibility in charge motion after rad • Additional defect growth must occur in these devices during the anneal – why? 2006 MURI Annual Review

  12. After rad, |ΔVot| > |ΔVit| Rad: 1 Mrad (SiO2); 2 MV/cm Anneals: ±2 MV/cm @ 50 C • Both electron exchange and H+ motion occur • Enhanced reversibility in Votconsistent with large e-h (dipole) generation during rad 2006 MURI Annual Review

  13. Post-CVS annealing at 50C|ΔVot| < |ΔVit| CVS: (– 3.6 MV/cm; 1200s; 25ºC) Anneals: ±2 MV/cm • Similar trend as post-rad, but now Vit dominates • No electron-hole pair creation due to low voltage; lack of radiation • Proton interactions relatively more important than for post-rad case 2006 MURI Annual Review

  14. More annealing cycles lead to enhanced defect growth CVS: (– 3.6 MV/cm; 1200s; 25ºC) Anneals: ±2 MV/cm • Degradation increases with time (not just reversibility) • Defect growth increases with annealing time and temperature 2006 MURI Annual Review

  15. Defect growth with time: post-CVS(similar trends post-rad) CVS: (– 3.6 MV/cm; 1200s; 25ºC) Anneals: ±2 MV/cm • Low electric fields, but high enough to increase gate current • Gate current increases with temperature • Additional CVS stress occurs during annealing cycles at high-T • Enhanced H+ motion and interactions lead to increasing ∆Vit, ∆Vot 2006 MURI Annual Review

  16. High-κdevices can trap large numbers of compensating electrons and holes during irradiation. Leads to significant reversibility in ∆Vot during switched-bias annealing. Effects large enough to cause pMOS transistors to fail in circuit applications. Constant-voltage stress experiments show the importance of hydrogen motion and reactions on device response. Reversible with bias. But generally increasing with time and temperature. Unless effects are addressed via process improvements, qualification of high-κdevices for space application will require additional screening and testing margins, as compared to SiO2 Conclusions and Implications 2006 MURI Annual Review

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