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Arithmetic circuits

Arithmetic circuits. Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement arithmetic Arithmetic building blocks. Powers of 2 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 10 2 11 2 12 2 13 2 14 2 15

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Arithmetic circuits

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  1. Arithmetic circuits • Binary addition • Binary Subtraction • Unsigned binary numbers • Sign-magnitude numbers • 2’S Complement representation • 2’S Complement arithmetic • Arithmetic building blocks

  2. Powers of 2 20 21 22 23 24 25 26 27 28 29 210 211 212 213 214 215 216 Decimal Equivalent 1 2 4 8 16 32 64 128 256 512 1,024 2,048 4,096 8,192 16,384 32,768 65,536 Powers of 2 Abbreviation 1K 2K 4K 8K 16K 32K 64K

  3. Decimal 1 3 7 15 31 63 127 255 511 1,023 2,047 4,095 8,191 16,383 32,767 65,535 Decimal-Binary Equivalences Binary 1 11 111 1111 1 1111 11 1111 111 1111 1111 1111 1 1111 1111 11 1111 1111 111 1111 1111 1111 1111 1111 1 1111 1111 1111 11 1111 1111 1111 111 1111 1111 1111 1111 1111 1111 1111 Hexadecimal 1 3 7 F 1F 3F 7F FF 1FF 3FF 7FF FFF 1FFF 3FFF 7FFF FFFF

  4. Binary addition A B SUM CO 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 HALF ADDER A SUM B CO (AB) + (AB) 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 = 0 + carry of 1 into next position 1 + 1 + 1 = 11 = 1 + carry of 1 into next position SUM = Carry-Out = (AB)

  5. Binary addition CI A B SUM CO 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 A FULL ADDER SUM B 0 1 1 0 1 CO CI 1 0 0 1 0 1 0 1 0 1 + + 1 1 0 0 1 (AB)CI + (A+B)CI 1 1 1 1 1 (A B)CI + (A B)CI 1-bit 8 Strings Full Adder with Carry-In and Carry-Out SUM = Carry-Out =

  6. 1-bit 8 Strings Full Adder with Carry-In and Carry-Out A FULL ADDER SUM B CO CI + + (AB)CI + (A+B)CI (A B)CI + (A B)CI SUM = Carry-Out =

  7. Binary addition

  8. Binary Subtraction A B SUB BO 0 0 0 0 0 1 1 1 1 0 1 0 1 1 0 0 HALF Subtractor A SUB B BO 0 - 0 = 0 1 - 0 = 1 1 - 1 = 0 0 - 1 = 1 ต้องยืมจากหลักที่สูงกว่ามา 1 SUB = Borrow-Out =

  9. Binary Subtraction BI A B SUB BO 0 0 0 0 0 0 0 1 1 1 0 1 0 1 0 0 1 1 0 0 1 0 0 1 1 1 0 1 0 1 1 1 0 0 0 1 1 1 1 1 1-bit 8 Strings Full Subtractor with Borrow-In and Borrow -Out A FULL Subtractor SUB B BO BI SUB = Borrow-Out =

  10. REPRESENTING UNSIGNED NUMBERS(Absolute value)

  11. REPRESENTING SIGNED NUMBERSin sign-magnitude form. Magnitude = 5210 SIGN BIT Magnitude = 5210 SIGN BIT

  12. REPRESENTING SIGNED NUMBERSin the 2’ S-complement system. True binary SIGN BIT 2’s complement SIGN BIT

  13. Range of Sign-Magnitude Numbers SIGN BIT

  14. Range of Sign-Magnitude Numbers SIGN BIT

  15. การคอมพลีเมนต์เลขฐานสองการคอมพลีเมนต์เลขฐานสอง แบ่งออกเป็น • คอมพลีเมนต์ 1 (1’s complement) • คอมพลีเมนต์ 2 (2’s complement) • การคอมพลีเมนต์เลขฐานสองนี้นำไปใช้เกี่ยวกับการคำนวณทางไมโครคอมพิวเตอร์มากเพราะว่าจะใช้ในลักษณะการลบด้วยวิธีการบวกด้วยคอมพลีเมนต์ • สรุปการลบด้วยการบวกด้วยคอมพลีเมนต์นั้นจะทำนองเดียวกับการคอมพลีเมนต์เลขฐานสิบ

  16. การคอมพลีเมนต์เลขฐานสองการคอมพลีเมนต์เลขฐานสอง X3X2X1X0 = 0111 X3 X2 X1 X0 X3 X2 X1 X0 X3X2X1X0 = 1000 1’s complement 2’s complement 2’s complement = 1’s complement + 1

  17. Positive and Negative Numbers 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 -8 -7 -6 -5 -4 -3 -2 -1 0 +1 +2 +3 +4 +5 +6 +7

  18. 2’ S-complement representation summary • Positive numbers always have a sign bit of 0, and negative numbers always have a sign bit of 1. • Positive numbers are stored in sign-magnitude form. • Negative numbers are stored as 2’s complements. • Taking the 2’s complement is equivalent to a sign change.

  19. Example : 1101 1101 -35 0010 1111 2F 1011 1101 -67 9E-98 0111 0000 +112 1000 0011 83 0110 1110 110 1011 0010 1101 1010 B2DA

  20. 2’s complement arithmetic CASE 2 Positive and smaller negative. +125 -68 0111 1101 1011 1100 0101 0011 0001 0000 ADDITION CASE 1 Both positive. +83 +16 83 0101 0011 +16+0001 0000 99 0110 0011 125 0111 1101 +(-68)+1011 1100 57 1 0011 1001 CASE 3 Positive and larger negative. +37 -115 CASE 4 Both negative. -43 -78 1101 0101 1011 0010 0010 0101 1000 1101 -43 1101 0101 +(-78)+1011 0010 -121 1 1000 0111 37 0010 0101 +(-115)+1000 1101 -78 1011 0010

  21. 2’s complement arithmetic CASE 2 Positive and smaller negative. +68 -27 0100 0100 1110 0101 0101 0011 0001 0000 SUBTRACTION CASE 1 Both positive. +83 +16 83 0101 0011 +(-16)+1111 0000 67 1 0100 0011 68 0100 0100 +(+27)+0001 1011 95 0101 1111 CASE 3 Positive and larger negative. +14 -108 CASE 4 Both negative. -43 -78 1101 0101 1011 0010 0000 1110 1001 0100 -43 1101 0101 +(+78)+0100 1110 35 1 0010 0011 14 0000 1110 +(+108)+0110 1100 122 0111 1010

  22. Controlled inverter INVERT

  23. SUBTRACTION A7 A6 A5 A4 A3 A2 A1 A0 +B7 B6 B5 B4 B3 B2 B1 B0 +1 S7 S6 S5 S4 S3 S2 S1 S0 - - - - - - - - Binary adder-subtractor diagram ADD/SUB S8 ADDITION A7 A6 A5 A4 A3 A2 A1 A0 +B7 B6 B5 B4 B3 B2 B1 B0 S7 S6 S5 S4 S3 S2 S1 S0

  24. Binary adder-subtractor circuit. ADD/ 7483 7483

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