John regehr university of utah joint work with nathan cooprider
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John Regehr University of Utah Joint work with Nathan Cooprider. Offline Compression for On-Chip RAM. Microcontrollers (MCUs). $12.5 billion market in 2006 ~10 billion units / year MCU-based products typically highly sensitive to unit cost. On-Chip RAM is Small. Atmel AVR examples

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Offline Compression for On-Chip RAM

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John regehr university of utah joint work with nathan cooprider

John Regehr

University of Utah

Joint work with Nathan Cooprider

Offline Compression for On-Chip RAM


Microcontrollers mcus

Microcontrollers (MCUs)

  • $12.5 billion market in 2006

  • ~10 billion units / year

  • MCU-based products typically highly sensitive to unit cost


On chip ram is small

On-Chip RAM is Small

  • Atmel AVR examples

    • mega48 – 0.5 KB RAM – $1.50

    • mega128 – 4 KB RAM – $8.75

    • mega256 – 8 KB RAM – $10.66

  • SRAM can dominate power consumption of a sleeping chip

  • On-chip flash memory is larger

    • 1 transistor / bit vs. 6 transistors / bit for SRAM


Out of ram what next

Out of RAM – What Next?

  • Manually optimize RAM usage?

  • Remove features?

  • Buy MCUs with more RAM?


Is ram used efficiently

Is RAM Used Efficiently?

  • Performed byte-level value profiling for TinyOS applications

    • Simulator counts distinct values stored in each byte of RAM over a number of executions

  • Result: Average byte stores four values!

    • These applications are already tuned for RAM usage


Ram compression

RAM Compression

  • Use static analysis to find redundancy in scalars, pointers, structs, arrays in embedded C code

  • Automatically perform sub-word packing to save RAM


Static analysis

Static Analysis

  • Input: C program

    • For example, output of nesC compiler

  • Output: Value set for each variable

    • E.g. {0,1} for a boolean

  • Analysis built on standard techniques

  • However:

    • Very aggressive compared to e.g. gcc

    • Many tricks to get good precision on TinyOS applications – several novel


Offline compression for on chip ram

x ≝ variable that occupies n bits

Vx≝ conservative estimate of value set

log2|Vx| < n RAM compression possible

Cx≝ another set such that |Cx| = |Vx|

fx≝ bijection from Vx to Cx

n - log2|Cx| bits saved through compression of x


Offline compression for on chip ram

void (*function_queue[8])(void);


Offline compression for on chip ram

void (*function_queue[8])(void);

x

n = size of a function pointer = 16 bits


Offline compression for on chip ram

Vx

x

&function_A

&function_B

&function_C

NULL


Offline compression for on chip ram

n = 16 bits

Vx

x

|Vx| = 4

log2|Vx| < n

2 < 16


Offline compression for on chip ram

Vx

Cx

x

fx≝Vx to Cx≝ compression

0

1

fx-1≝Cx to Vx≝ decompression

2

3


Offline compression for on chip ram

ROM

Cx

Vx = { , , , }

x

0

fx≝ compression

table scan

1

2

fx-1≝ decompression

table lookup

3


Offline compression for on chip ram

ROM

Cx

Vx = { , , , }

x

0

1

128 bits reduced to 16 bits

2

112 bits of RAM saved

3


Implementation

Implementation

  • Source-to-source transformation for C

    • Rewrite declaration, initializer, reads, writes

  • What about value sets of size 1?

    • log2 1 = 0

    • No bits required – just propagate the constant

  • Optimizations

    • Avoid table-driven compression funcs when possible

    • Align hot compressed values on word boundaries

    • Merge redundant compression tables

    • Compile-time compression when storing constants


Ram compression results

RAM Compression Results

*

 simulator unavailable


Ram compression results1

RAM Compression Results

Constant Prop / DCE

10% RAM reduction

20% ROM reduction

5.9% duty cycle reduction

*

 simulator unavailable


Ram compression results2

RAM Compression Results

Constant Prop / DCE

10% RAM reduction

20% ROM reduction

5.9% duty cycle reduction

Compression

22% RAM reduction

3.6% ROM reduction

29% duty cycle increase

*

 simulator unavailable


Tuning ram compression

Tuning RAM Compression

  • Can elect to not compress some compressible variables

    • But which ones?

  • For each compressible variable compute a cost / benefit ratio

    • Cost – estimated penalty in ROM or CPU cycles

    • Benefit – RAM savings

  • Sort compressible variables by ratio and compress until some threshold is met


Cost benefit ratio

Cost/Benefit Ratio

C ≝ access profile

A,B ≝ platform-specific costs

V ≝ cardinality of value set


Cost benefit ratio1

Cost/Benefit Ratio

C ≝ access profile

A,B ≝ platform-specific costs

V ≝ cardinality of value set

Su≝ original size

Sc≝ compressed size


Turning the ram knob

Turning the RAM Knob

0%


Turning the ram knob1

Turning the RAM Knob

10%


Turning the ram knob2

Turning the RAM Knob

20%


Turning the ram knob3

Turning the RAM Knob

30%


Turning the ram knob4

Turning the RAM Knob

40%


Turning the ram knob5

Turning the RAM Knob

50%


Turning the ram knob6

Turning the RAM Knob

60%


Turning the ram knob7

Turning the RAM Knob

70%


Turning the ram knob8

Turning the RAM Knob

80%


Turning the ram knob9

Turning the RAM Knob

90%


Turning the ram knob10

Turning the RAM Knob

100%


Turning the ram knob11

Turning the RAM Knob

95%


Compression spectrum

Compression Spectrum


Compression spectrum1

Compression Spectrum

95%


Compression spectrum2

Compression Spectrum

95%


Conclusion

Conclusion

  • RAM likely to remain scarce in low-cost, low-power MCUs

  • RAM is used inefficiently

  • Manually RAM optimization is unpleasant

  • Tradeoffs are useful

  • CComp implements RAM compression

    http://www.cs.utah.edu/~coop/research/ccomp/


Analysis times

Analysis Times


No ram compression

No RAM Compression

*

⇒ simulator unavailable


Full ram compression

Full RAM Compression

*

⇒ simulator unavailable


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