Model Predictive Control for Embedded Applications Leonidas G. Bleris Panagiotis Vouzis, Mark Arnold, and Mayuresh V. Kothare 2006 AIChE Annual Meeting San Francisco, CA. Introduction. Model Predictive Control Theory MPC for Portable Devices Implementation Pathways Applications
Leonidas G. Bleris
Panagiotis Vouzis, Mark Arnold, and Mayuresh V. Kothare
2006 AIChEAnnual MeetingSan Francisco, CA
A class of control algorithms that utilize an explicit process model
to compute a manipulated variable profile that will optimize an open-loop
performance objective over a future time interval.
The performance objective typically penalizes predicted future errors and
manipulated variable movement subject to constraints
(Qin & Badgwell, 2003)
+ Control & Prediction horizons + Weighting matrices
Choosing an MPC technology for a given application can
be a complex task!
Need for advanced embedded controllers is inherent in multiple
Desirable characteristics of an MPC chip?
R. Dorf and R. Bishop, Modern Control Systems, Addison Wesley, 7th edition, 1995.
Figure: Diabetes patients in US
Economist, September 2006
control hardware must be included within the system design.”
One of the issues raised was that software and DSP based control:
Shapiro B. Workshop on Control and System Integration of Micro- and Nano-Scale Systems, Technical Report, National Science Foundation Workshop, 2004
Sitti M. Workshop on Future Directions in Nano-Scale Systems, Dynamics and Control, Technical report, National Science Foundation Workshop, 2003
Input (16 bits)
Output (16 bits)
Data or Status
N: Number of states
B = P×M
A = P×N
Yref = 1×M
Gradient, Hessian, Gauss-Jordan
Profiling results for a benchmark control
problem on a Pentium processor.
The clock cycles required by each function of the Newton’s algorithm for one optimization iteration
Profiling results for the benchmark problem on the ADCUS-Coprocessor architecture
Satisfy: System performance requirements using minimum required implementation complexity
Emulations: Logarithmic number system (LNS) arithmetic
K integer bits and F fraction bits
LNS: advantage in cost, power consumption and speed, that increases as the word size decreases
Adjust the size of words (the #bits processed in a single instruction) using parametric simulation tests
Figure: % of error for different control horizons
Using K=7, F=20 and CH=6
Figure: % of error for different values of F
Figure: Actuation/ Output (K=5, F=10 and CH=6)
Using K=5, F=10 and CH=6
Using K=5, F=8 and CH=6
L. Bleris, J. Garcia, M. Arnold and M. Kothare, “Towards Embedded Model Predictive Control for System-On-a-Chip Applications”, Journal of Process Control, 16, 255-264, Mar. 2006.
Switching between setpoints using MPC (solid line)
and a heuristic controller (dashed line).
Top plot: transient response of the concentration using
step response (dashed line), MPC I (thin line) and MPC II (solid line). Bottom plot: the actuation for the MPC II case.
L. Bleris, J. Garcia, M. Arnold and M. Kothare, “Model predictive hydrodynamic regulation of microflows”. Journal of Micromechanics and Microengineering, 16, 1792-1799, 2006.
Thank you for your attention