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计算机组成原理重点难点剖析 PowerPoint PPT Presentation


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计算机组成原理重点难点剖析. 第4章 存储器. 重点. 1. 存储系统的层次结构 Cache -主存和主存-辅存层次的作用 程序访问的局部性原理与存储系统层次结构 的关系. 10 ns. 20 ns. 200 ns. ms. CPU. 缓存. 主存. 辅存. (速度). (容量). 缓存. 主存. 主存. 辅存. 主存储器. 虚拟存储器. 虚地址. 实地址. 物理地址. 逻辑地址. 缓存 主存层次和主存 辅存层次. 第4章 存储器. 重点. 1. 存储系统的层次结构

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计算机组成原理重点难点剖析

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4364268


4364268

1.

Cache


4364268

10 ns

20 ns

200 ns

ms

CPU


4364268

1.

Cache

2. Cache


4364268

MDR

MAR


4364268

MDR

CPU

MAR

CPU


4364268

Cache

CPU

Cache

Cache

Cache


4364268

I

I

N

S

S

N

0

1


4364268

N

S

S

N

f

f

s

s

e

e

t

t

0

1


4364268

Cache


4364268

1.

Cache

2. Cache

3. CPU


4364268

(1)

(2)

(3) /

(4)

(5)

(6)

CPU


4364268

CPU168

MREQ

WR /

RAM 1K44K88K8

ROM 2K84K88K8

74LS138

CPU

6000H67FFH

6800H6BFFH


4364268

12K8

0 1 1 0

0 1 1 0

0 0 0 0

1 0 0 0

0 0 0 0

0 0 0 0

0 0 0 0

0 0 0 0

ROM

2K8

0 1 1 0

0 1 1 0

0 1 1 1

1 0 1 1

1 1 1 1

1 1 1 1

1 1 1 1

1 1 1 1

1K8

RAM

21K4

:

(1)

A15A14A13 A11 A10 A7 A4 A3 A0

(2)


4364268

A15 A13 A11 A10 A7 A4 A3 A0

1ROM

0 1 1 0

0 1 1 0

1 0 0 0

0 0 0 0

0 0 0 0

0 0 0 0

0 0 0 0

0 0 0 0

2K8

0 1 1 0

0 1 1 0

0 1 1 1

1 0 1 1

1 1 1 1

1 1 1 1

1 1 1 1

1 1 1 1

2RAM

1K4

C

B

A

(3)

A10~ A0 2K 8 ROM

A9 ~ A0 1K 4 RAM

(4)


4364268

A14

G1

Y5

A15

&

G2A

G2B

A13

MREQ

C

Y4

A12

B

A11

A

A10

A9

..

..

A0

2K8

PD/Progr

1K4

1K4

ROM

RAM

RAM

D7

..

D4

D3

..

D0

WR

(5)CPU


4364268

1.

Cache

2. Cache

3. CPU

4.


4364268

0

0

78H

3

0

2

1

56H

1

2

34H

12H

3

0

4

4

4

7

5

6

6

5

7

4

8

8

8

11

10

9

10

9

11

8

0

12H

34H

56H

78H

0

4

4

8

8

1.

1 2 3 4 5 6 7 8 H


4364268

1.

2.


4364268

24

23

22

16 MB 227

23

224= 16 M

224= 227

16

223= 8 M

223= 227

24

32

222= 4 M

222 = 227

25

16

32


4364268

1.

2.

3.


4364268

M0

M1

M2

M3

00 0000

01 0000

10 0000

11 0000

00 0001

01 0001

10 0001

11 0001

00 1111

01 1111

10 1111

11 1111

(1)


4364268

M0

M1

M2

M3

n

2n

3n

0

n+1

2n+1

3n+1

1

n1

2n1

3n1

4n1

(1)


4364268

M0

M1

M2

M3

0000 00

0000 01

0000 10

0000 11

0001 00

0001 01

0001 10

0001 11

1111 00

1111 01

1111 10

1111 11

(2)


4364268

M0

M1

M2

M3

0

1

2

3

5

6

7

4

4n4

4n3

4n2

4n1

(2)


4364268

0

1

2

3


4364268

T T 4

4 T(41)


4364268

1.

2.

3.

4. Cache


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t

Cache

0

0

0

0

0

1

*

1

1

2c1

2c

2c

C1

2c1

t

2c +1

=

2c+11

Cache

2c+1

2c+1

=1

c

b

t

2m1

m

1

i = jmodC

i

j


4364268

Cache

m=t+c

0

0

0

1

1

2c1

2c1

2m1

m = t + c

b

2


4364268

Cache

Q r = 1)

0

0

0

0

0

1

1

1

2

3

1

2c-r

1

2c-r

2c-r

2c-r1

2c2

2c1

2c-r +1

q = cr

b

s = t + r

2c-r+1

2c-r+1

m

2m1

3

i = jmodQ

j Q i


4364268

1Cache

2

3 Cache

5 1

512 KBCache 4KB

16 32

Cache 4KB Cache 12

4KB/4B = 1K 1K/16 = 64

512KB 19

512KB/4B = 128K 128K/16 = 8192

564 + 5264 + 5 8192 64 + 5

Cache 5


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6 4 16 2 32 64 6 Cache 19 - 12 = 7

4


4364268

Cache 4K Cache 12

4 2

Cache 4K/4 = 1024

512K 19

512K16 Cache 409616

4 16

1


4364268

2 Cache 1024

1024/2 = 512 29 = 512 9

512K16 Cache 409616

416

2

3


4364268

4 16 16

512K32 1024K16

20

4 Cache1024/4 = 256

28 = 256 8

512K16 Cache 409616

4 16

4 512K32


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