Decay Spectroscopy at FAIR Using the Advanced Implantation Detector Array (AIDA)

1. Decay Spectroscopy at FAIR Using the Advanced Implantation Detector Array (AIDA) presented by Tom Davinson on behalf of the AIDA collaboration (Edinburgh – Liverpool – STFC DL & RAL) Tom Davinson School of Physics & Astronomy The University of Edinburgh

2. Presentation Outline • r-process • Nuclear Physics Observables • FAIR • SuperFRS • Decay Spectroscopy (DESPEC) • Advanced Implantation Detector Array (AIDA)

3. Heavy Element Abundance: Solar System Si=106 from B.S.Meyer, Ann. Rev. Astron. Astrophys. 32 (1994) 153 r-process produces roughly one-half of all elements heavier than iron

4. Heavy element nucleosynthesis

5. r-process Kratz et al., ApJ 403 (1993) 216 • seed nuclei (A≥70) • synthesis far from valley of stability • equilibrium (n,g) and (g,n) reactions • n-capture until binding energy becomes small • wait for b decay to nuclei with higher binding energy

6. r-process: What do observations tell us? • CS22892-052 • galactic halo star (intermediate population II) • red giant • ‘metal poor’ [Fe/H] = -3.0 Matches relative elemental solar abundance pattern • common site/event type? • applies to ‘metal poor’ and • ‘metal rich’ stars • – rapid evolution of old stars? from Cowan & Sneden, Nature 440 (2006) 1151

7. r-process: U/Th Cosmo-chronology • long half-lives • very similar mass • r-process production only Cowan et al., ApJ 572 (2002) 861 (13.8±4)Ga (14.1±2.5)Ga Wanajo et al., ApJ 577 (2002) 853 from Cowan & Sneden, Nature 440 (2006) 1151

8. r-process: b-delayed neutron emission • Sn<Qb • increasing N→ lower Sn,higher Qb after b-decay before b-decay Kratz et al., ApJ 403 (1993) 216 Effect of b-delayed neutron emission: modification (smoothing) of final abundance pattern at freezeout

9. r-process: Nuclear physics observables Primary nuclear physics observables from studying the decay spectroscopy (principally b and b-delayed neutron emission) of r-process nuclei

10. FAIR: Facility for Antiproton and Ion Research GSI today Future facility 100 m SIS 100/300 SIS 18 UNILAC ESR • Cost • Approx €1000M • €650M central German government • €100M German regional funding • €250M from international partners • Timescale • Feb 2006- German funds in budget 2007-14 • 2007 project start • 2016 phased start experiments • 2018 completion HESR Super FRS RESR NUSTAR NESR

11. FAIR: SuperFRS layout courtesy ofMartin Winkler, GSI • Fast radioactive beams can be used to study r-process • chemistry independent • fast production • measure several nuclei simultaneously • measurements possible with low rates

12. FAIR: Production Rates Predicted Lifetimes > 100ns from FAIR CDR, section 2

13. FAIR: HISPEC/DESPEC Proposed layout August 2006 (for illustrative purposes – way out of date!) courtesy of Martin Winkler, GSI

14. DESPEC: Implantation DSSD Concept • SuperFRS, Low Energy Branch (LEB) • Exotic nuclei – energies ~ 50 – 200MeV/u • Implanted into multi-plane, highly segmented DSSD array • Implant – decay correlations • Multi-GeV DSSD implantation events • Observe subsequent p, 2p, a, b, g,bp, bn … low energy (~MeV) decays • Measure half lives, branching ratios, decay energies … • Tag interesting events for gamma and neutron detector arrays

15. Implantation DSSD Configurations • Two configurations proposed: • 8cm x 24cm • “cocktail” mode • many isotopes measured simultaneously • b) 8cm x 8cm • concentrate on particular isotope(s) • high efficiency mode using: • total absorption spectrometer • moderated neutron detector array

16. Implantation – Decay Correlation • DSSD strips identify where (x,y) and when (t0) ions implanted • Correlate with upstream detectors to identify implanted ion type • Correlate with subsequent decay(s) at same position (x,y) at times t1(,t2, …) • Observation of a series of correlations enables determination of energy • distribution and half-life of radioactive decay • Require average time between implants at position (x,y) >> decay half-life • depends on DSSD segmentation and implantation rate/profile • Implantation profile • sx ~ sy ~ 2cm, sz ~ 1mm • Implantation rate (8cm x 24cm) ~ 10kHz, ~ kHz per isotope (say) • Longest half life to be observed ~ seconds • Implies quasi-pixel dimensions ~ 0.5mm x 0.5mm

17. AIDA: DSSD Array Design • 8cm x 8cm DSSDs • common wafer design for 8cm x 24cm and 8cm x 8cm configurations • 8cm x 24cm • 3 adjacent wafers – horizontal strips series bonded • 128 p+n junction strips, 128 n+n ohmic strips per wafer • strip pitch 625mm • wafer thickness 1mm • DE, Veto and up to 6 intermediate planes • 4096 channels (8cm x 24cm) • overall package sizes (silicon, PCB, connectors, enclosure … ) • ~ 10cm x 26cm x 4cm or ~ 10cm x 10cm x 4cm

18. ASIC Design Requirements Selectable gain 20 100020000 MeV FSR Low noise 12 60050000 keV FWHM energy measurement of implantation and decay events Selectable threshold < 0.25 – 10% FSR observe and measure low energy b, b detection efficiency Integral non-linearity < 0.1% and differential non-linearity < 2% for > 95% FSR spectrum analysis, calibration, threshold determination Autonomous overload detection & recovery ~ ms observe and measure fast implantation – decay correlations Nominal signal processing time < 10ms observe and measure fast decay – decay correlations Receive (transmit) timestamp data correlate events with data from other detector systems Timing trigger for coincidences with other detector systems DAQ rate management, neutron ToF

19. Schematic of Prototype ASIC Functionality • Note – ASIC will also evaluate use of digital signal processing • Potential advantages • decay – decay correlations to ~ 200ns • pulse shape analysis • ballistic deficit correction

20. AIDA: ASIC schematic

21. AIDA: Current Status • Edinburgh – Liverpool – STFC DL – STFC RAL collaboration • - DSSD design, prototype and production • - ASIC design, prototype and production • - Integrated Front End FEE PCB development and production • - Systems integration • - Software development • Deliverable: fully operational DSSD array to DESPEC • Proposal approved & fully funded - project commenced August 2006 • Detailed Technical Specification published November 2006 • Technical Specification released to project engineers January 2007 • Integrated prototype hardware available December 2009 • Production 2010/Q3 We are here!

22. Prototype AIDA ASIC: Top level design • Analogue inputs left edge • Control/outputs right edge • Power/bias top and bottom • 16 channels per ASIC • Prototypes delivered May 2009 MPW run 100 dies delivered • Functional tests at STFC RAL OK

23. Prototype AIDA ASIC

24. 3: High Energy (HE) + ME Input signals (voltage step capacitive-coupled) Preamp buffered output (Low-Medium Energy Channel) “Range” signal High = high-energy channel active “Data Ready” signal Fixed high-energy (HE) event (610pC) followed by three ME events (15pC, 30pC, 45pC): the ASIC recovers autonomously from the overload of the L-ME channel and the second event is read correctly.

25. 3: High Energy (HE) + ME Input signals (voltage step capacitive-coupled) Analog output (peak-hold multiplexed output) “Range” signal High = high-energy channel active “Data Ready” signal First value (constant) given by the High-Energy channel, second by the Medium-Energy channel.

26. FEE Assembly Sequence

27. AIDA: status • Systems integrated prototypes available • - prototype tests in progress • Production planned Q3/2010 Mezzanine: 4x 16 channel ASICs Cu cover EMI/RFI/light screen cooling FEE: 4x 16-bit ADC MUX readout (not visible) 8x octal 50MSPS 14-bit ADCs Xilinx Virtex 5 FPGA PowerPC 40x CPU core – Linux OS Gbit ethernet, clock, JTAG ports Power FEE width: 8cm Prototype – air cooling Production – recirculating coolant

28. Prototype AIDA Enclosure • Design drawings (PDF) available • http://www.eng.dl.ac.uk/secure/np-work/AIDA/

29. Prototype AIDA Enclosure • Prototype mechanical design • Based on 8cm x 8cm DSSSD • evaluate prior to design for 24cm x 8cm DSSSD • Compatible with RISING, TAS, 4p neutron detector • 12x 8cm x 8cm DSSSDs • 24x AIDA FEE cards • 3072 channels • Design complete • Mechanical assembly in • progress

30. AIDA: Project Partners • The University of Edinburgh (lead RO) • Phil Woods et al. • The University of Liverpool • Rob Page et al. • STFC DL & RAL • John Simpson et al. • Project Manager: Tom Davinson • Further information:http://www.ph.ed.ac.uk/~td/AIDA • Technical Specification: • http://www.ph.ed.ac.uk/~td/AIDA/Design/AIDA_Draft_Technical_Specification_v1.pdf

31. Acknowledgements My thanks to: STFC DL Patrick Coleman-Smith,Ian Lazarus, Simon Letts, Paul Morrall, Vic Pucknell, John Simpson & Jon Strachan STFC RAL Davide Braga, Mark Prydderch & Steve Thomas University of Liverpool Tuomas Grahn, Paul Nolan,Rob Page, Sami Ritta-Antila & Dave Seddon University of Edinburgh Zhong Liu, Phil Woods