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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design. Course and contest Results of Phase 4 Nam Pham Van. Design comparison. P ~ A Power: P = ( P dyn * P leak ) Area: A  Reduction of the area  lower the power consumption. Design & architecture.

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spezielle anwendungen des vlsi entwurfs applied vlsi design

Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

Course and contest

Results of Phase 4

Nam Pham Van

design comparison
Design comparison

P ~ A Power: P = (Pdyn * Pleak)

Area: A

 Reduction of the area  lower the power consumption

design architecture
Design & architecture
  • RCA  small area  low power consumption
  • Improve speed with Carry Skip architecture
design architecture optimization
Design & architecture optimization
  • Adder Reduction:
  • 10 bit  8 bit
  • 11 bit  10 bit
  • 16 bit  13 bit
  • Influences:
  • Minimized switch activity
  • Reduced area & power consumption
cadence configuration
Cadenceconfiguration

Setting Effect

  • Netlist optimization
  • Design optimization
  • Higher frequency are possible
  • Power consumption raised immense
  • Antenna fixing
  • Eco route
  • Wire optimization
  • No impact
  • Other gate libraries
  • Higher frequency are possible
  • Extreme high leakage power consumption
cadence configuration1
Cadenceconfiguration
  • Best settings:
  • Core Ratio H/W: 1
  • Core Utilization: 90
  • IO Boundary: 15
  • Power Ring:
    • Width: 2
    • Spacing: 0.5
    • Offset: 2
  • COREHVTtyp10V
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