slide1
Download
Skip this Video
Download Presentation
GLAST Large Area Telescope: Electronics, Data Acquisition & Flight Software Electronics

Loading in 2 Seconds...

play fullscreen
1 / 39

GLAST Large Area Telescope: Electronics, Data Acquisition & Flight Software Electronics - PowerPoint PPT Presentation


  • 194 Views
  • Uploaded on

Gamma-ray Large Area Space Telescope. GLAST Large Area Telescope: Electronics, Data Acquisition & Flight Software Electronics Gunther Haller Stanford Linear Accelerator Center Manager, Electronics, DAQ & FSW LAT Chief Electronics Engineer [email protected] (650) 926-4257.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about ' GLAST Large Area Telescope: Electronics, Data Acquisition & Flight Software Electronics ' - meena


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
slide1

Gamma-ray Large Area Space Telescope

GLAST Large Area Telescope:

Electronics, Data Acquisition & Flight Software

Electronics

Gunther Haller

Stanford Linear Accelerator Center

Manager, Electronics, DAQ & FSW

LAT Chief Electronics Engineer

[email protected]

(650) 926-4257

electronics outline
Electronics Outline
  • Overview
  • Team
  • Front-End Electronics
  • Tower Electronics Module
    • GLAST Calorimeter Cable Controller ASIC (GCCC)
    • GLAST Tracker Cable Controller ASIC (GTCC)
  • GAS Unit
  • GLAST Global Trigger Controller (GLTC)
  • SIU/EPU Crate
    • LAT Communication Board
    • Spacecraft Interface Board
    • Processor
  • Spacecraft Interface
  • Verification & Test
  • Testbed
  • Summary
lat electronics signals
LAT Electronics (Signals)
  • TKR: Tracker
  • CAL: Calorimeter
  • ACD: Anti-Coincidence Detector
  • TEM: Tower Electronics Module
  • EPU: Event Processor Unit
  • SIU: Spacecraft Interface Unit
  • GAS Unit: Global Trigger-ACD-Signal Distribution Unit
lat electronics power
LAT Electronics (Power)
  • TKR: Tracker
  • CAL: Calorimeter
  • ACD: Anti-Coincidence Detector
  • TEM: Tower Electronics Module
  • EPU: Event Processor Unit
  • SIU: Spacecraft Interface Unit
  • GAS Unit: Global Trigger-ACD-Signal Distribution Unit
  • PDU: Power Distribution Unit*

* PDU is presented separate in Power System presentation

slide5
Team
  • Power Distribution Unit
    • Patrick Young, SLAC
  • GAS Unit
    • Joszef Ludvig, SLAC
  • TEM DAQ Module
    • Leonid Sapozhnikov, SLAC
  • Tower Power Supply
    • Vendor (Oversight: Dave Nelson, SLAC)
  • Spacecraft Interface Board
    • Michael Lovellette, Greg Clifford, Dennis Silver (NRL & Silver Engineering)
    • Software: Dan Wood (NRL)
  • Crate Backplane
    • Robert O’Leary, SLAC
  • Crate Power Supply Board
    • Robert O’Leary, SLAC
  • LAT Communication Board
    • Sandra Frazier, SLAC
  • GLAST Tracker Cable Controller ASIC
    • Leonid Sapozhnikov, Noman Ahmed, SLAC
  • GLAST Calorimeter Cable Controller ASIC
    • Leonid Sapozhnikov, Noman Ahmed, SLAC
  • GLAST Global Trigger ASIC
    • Joszef Ludvig, Noman Ahmed, SLAC
  • Front-End Simulator
    • Mark McDougald, SLAC
  • Parts
    • Mark Freytag, SLAC
  • Harness
    • Dave Nelson, Mark Freytag, SLAC
  • Packaging
    • Jobe Noriel, SLAC
  • ASIC & Board Analysis
    • Dieter Freytag, Oren Milgrome, SLAC
  • TKR sub-system electronics
    • Manager: Robert Johnson, UCSC
    • EE: Dave Nelson, SLAC
  • CAL sub-system electronics
    • System Manager: Neil Johnson, NRL
    • EE: Jim Ampe, NRL
  • ACD sub-system electronics
    • Manager: Dave Thompson, GSFC
    • EE: Glenn Unger, GSFC
  • Manager
    • Gunther Haller, SLAC
  • Flight Software Lead
    • JJ Russell, SLAC
  • DAQ System Lead
    • Mike Huffer, SLAC
  • Mechanical-Thermal Lead
    • Dave Nelson, SLAC
  • Power-EMI Lead
    • Dave Nelson, SLAC
  • EGSE Lead
    • Mike Huffer, SLAC
  • I&T Lead
    • Dave Nelson, SLAC
  • Mission Assurance Lead
    • Darren Marsh, Nick Virmani (SLAC, Swales)
  • Manufacturing Lead
    • Jerry Clinton, SLAC
  • Flight-Software Team: see FSW presentation
tracker electronics
Tracker Electronics
  • TKR sub-system electronics
      • Si-Strip Detectors
      • 24 GTFE (GLAST Tracker Front-End) ASIC (1,536 signal channels)
      • 2 GTRC (GLAST Tracker Readout Controller) ASIC
      • MCM (Multi-Chip Module)
      • Flex-cables
  • Presented in tracker sub-system CDR

GTRC ASIC

GTFE ASIC

calorimeter electronics
Calorimeter Electronics
  • CAL sub-system electronics
      • Diodes
      • 48 GCFE (GLAST Calorimeter Front-End) ASIC
      • 4 GCRC (GLAST Calorimeter Readout Controller) ASIC
      • AFEE (Analog Front-End Electronics) board
  • Presented in calorimeter sub-system CDR

GCRC ASIC

GCFE ASIC

acd electronics
ACD Electronics
  • ACD sub-system electronics
      • PMT’s
      • 18 GAFE (GLAST ACD Front-End) ASIC
      • 1 GARC (GLAST ACD Readout Controller) ASIC
      • FREE (Front-End Electronics) board
      • High-Voltage Supply board (not shown)
  • Presented in ACD sub-system CDR

GAFE ASIC

GARC ASIC

tower electronics daq module
Tower Electronics DAQ Module
  • Main DAQ module, one on each tower
    • Controls and reads out data from TKR MCM and CAL AFEE front-end electronics
    • Zero-suppresses CAL event data
    • Buffers events in cable ASIC FIFO’s
    • Assembles CAL and TKR event fragments to tower event
    • Transmits data to GASU
    • Contains monitoring and low-rate science circuits
    • LVDS interface to front-end electronics and GASU
    • Hardware with software controlled configuration and mode registers
      • CAL ICD: LAT-SS-00238
      • TKR ICD: LAT-SS-00176
      • TEM ICD: LAT-SS-00363

CAL (4 cables)

TKR (8 cables)

CAL Cable ASIC

TKR Cable ASIC

Control, Event & HSK Signals

Power

Trigger

Power from TEM PS Module

Power to TEM Elex

Trigger signals to/from Global Trigger on GAS Unit

Trigger Controller

Control & HSK signals from/to SIU, Event data to EPU, all via GAS Unit

Common Controller

tower electronics daq module con t
Tower Electronics DAQ Module (Con’t)
  • Engineering Model with full functionality and interfaces as flight has been used extensively in 18 copies in the field, controlled and readout with real-time software from the FSW group, and I&T software from the I&T group
  • Not just tested in TEM test-setup at SLAC, but more importantly fully integrated in set-ups with real sub-system electronics
    • at NRL and at SLAC with CAL electronics
    • In Italy and at SLAC with TKR electronics
    • At SLAC, NRL with DAQ electronics
  • Flight Model with 8 GTCC and 4 GCCC ASIC, plus 2 ACTEL’s: design finished, ready for layout/fabrication
  • LAT-TD-00605
tower electronics module gccc asic
Tower Electronics Module GCCC ASIC
  • GLAST Calorimeter Cable Controller (GCCC) ASIC
    • TEM interface to calorimeter AFEE
      • Configuration and readback data
      • Trigger and event data handling
      • Log suppression algorithm
      • Event buffers
    • Contains
      • Two 64x16 FIFO’s
      • Three 128x16 FIFO’s
      • Core Logic
      • LVDS drivers/receivers
    • VHDL code compiled into XILINX FPGA, is used on TEM’s which are operating with CAL electronics
    • ASIC in fabrication, expected April 25
    • LAT-TD-01549

LVDS IO

CORE

FIFO

GCCC

tower electronics module gtcc asic
Tower Electronics Module GTCC ASIC
  • GLAST Tracker Cable Controller (GTCC) ASIC
    • TEM interface to tracker MCM’s
      • Configuration and readback data
      • Trigger and event data handling
      • Data reformatting
      • Event buffers
    • Contains
      • Two 64x16 FIFO’s
      • Three 128x16 FIFO’s
      • Core Logic
      • LVDS drivers/receivers
    • VHDL code compiled into XILINX FPGA, is used on TEM’s which are operating with CAL electronics
    • ASIC in fabrication, expected April 25
    • LAT-TD-01550

LVDS IO

CORE

FIFO

GTCC

design verification for gccc gtcc
Design & Verification for GCCC/GTCC

VHDL

Simulation

Netlist

Automatic: Layout, Place&Route

Manual: Schematic of IO, LVDS

Automatic: Generate Schematic

Layout: Add IO and LVDS. Result: Complete Chip Layout

Compare

Simulation: Spice

Full Chip Schematic

Netlist w/o Parasitics

Netlist with Parasitics

Netlist

Stress & Timing Analysis

Full-Chip Simulation with Synopsys

Full-Chip Simulation with Synopsys

Full-Chip Compare/Verification

Flight-Model Status 3/03

Fabrication

Test

gas unit signal distribution and trigger
GAS Unit (Signal Distribution and Trigger)
  • Uses GLTC ASIC to receive LVDS signals and to logically mask and combine 228 ACD trigger signals
  • Global Trigger controller
    • Combines trigger inputs from TKR, CAL, ACD and makes trigger decision
    • Distributes trigger message with target CPU for event, time-stamp, event-number, and trigger type to sub-systems
    • Total time from particle in detector to receipt of trigger accept signal: 2 msec
  • Command Response Unit
    • Distributes control from SIU to TEM’s, GLT, ACD EM, EB
    • Transmits readback data from TEM’s, GLT, ACD, EB to EPU’s
  • Hardware with software controllable configuration & mode registers
    • GLT ICD: LAT-TD-01545
    • CMD-Response ICD: LAT-SS-00461; LAT-TD-00606
  • One prime and one redundant DAQ board
gas unit acd em event data
GAS Unit (ACD EM & Event Data)
  • Uses GLTC ASIC to convert LVDS to CMOS signals and to logically mask and combine 228 ACD trigger signals
  • ACD EM
    • Controls and reads out data from ACD front-end electronics
    • Buffers events
    • Assembles 12 ACD event fragments to ACD event
    • Transmits data to EB
    • Contains monitoring circuits
  • Event Builder
    • Receives event fragments from TEM’s, AEM, and GLT at up to 10 KHz rate
    • Builds LAT event and transmits to EPU’s/SIU’s at up to 10 KHz rate
    • Receives CPU data, forwards to other CPU’ s or to SC (science data interface)
  • Hardware with software controllable configuration & mode registers
    • ACD ICD: LAT-SS-00363
    • AEM ICD: LAT-TD-00639
    • EB ICD: LAT-TD-01546
  • One prime and one redundant DAQ board
gas unit con t
GAS Unit (Con’t)
  • Engineering Model with partial functionality and interfaces as flight has been used in several copies in the field, controlled and readout with real-time software from the FSW group, and I&T software from the I&T group
  • ACD EM at SLAC and GSFC, with real ACD front-end electronics
  • Trigger input signal received and trigger accept message generated via SLAC COM-module (either CAL, TKR, and ACD programmed)
  • Flight Model with 14 GLTC and 9 ACTEL’s: design finished, in layout/fabrication
  • GLAST Global Trigger Controller (GLTC) ASIC
    • LVDS receivers for ACD veto and CNO trigger signals
    • Maskable logical-OR function of ACD trigger signal
    • Handles 18 input signal channels
    • Contains
      • Core Logic
      • LVDS receivers
    • First version ASIC was received in Dec 02
    • Fully working, is flight design
    • Flight quantity is on shared LAT wafer-run expected back end of March 03
    • LAT-TD-0148
siu epu crate
SIU/EPU Crate
  • Spacecraft Interface Board (SIB)
    • EEPROM
    • MIL1553 Communication with spacecraft*
    • Power Control of PDU/GASU power switches in PDU*
    • Power Control of VCHP switches in heater box*
  • LAT Communication Board (LCB)
    • Communication with GASU
      • Commanding
      • Read-back Data
      • Housekeeping Data
      • Event Data
  • Power Supply Board (PSB)
    • 28V to 3.3V/5V conversion
    • Power-On Reset
    • LVDS-CMOS conversion of spacecraft discretes*
    • System clock to GASU
  • CPU Board
    • Processor
    • IO of level-converted SC discretes
  • Backplane
    • passive

* Only used in SIU crate

lat communication board con t
LAT Communication Board (Con’t)
  • PCI-interface engineering model in operation since early 03 (has PMC connector)
  • Flight Model has cPCI connector: design finished, scheduled to be in layout/fabrication 4/03
  • ICD: LAT-TD-00860
spacecraft interface board

TO LEFT HEATER

CONTROL BOX

+5V

POR

(12)

Heater

Register

4MB

EEPROM

4MB

EEPROM

FPGA

TO RIGHT HEATER

CONTROL BOX

+5V

POR

ACTEL RT54SX32S

(208PIN)

PCI Core

Target Only

(12)

LOCAL BUS

64

TO PRIMARY

PDU/GASU

cPCI

10

(4)

SUMMIT CTRL/STAT/SEL/ARB

TO REDUNDANT

PDU/GASU

(4)

cPCI

44

47

SHARED ADDRESS/DATA/CTRL

33MHZ

32bit

3.3V

PDU SPARE

(4)

EXT_POR_L

SRAM

32K x 16

+3.3V

+2.5V

VR

SµMMIT

UT69151DXE

1553 A BUS

24MHZ

1553 B BUS

48MHZ

/2

Spacecraft Interface Board
  • Designed/implemented by Silver Engineering (Dennis Silver, Greg Clifford) under contract by NRL
    • Driver by Dan Wood/NRL
  • Engineering model is in test since mid 02
    • 6U cPCI PCB Format
    • Uses J1 of cPCI
    • 12 Layer Polyimide Construction
    • 4 Chassis GND Planes
    • 3 Power and Ground Planes
    • 5 Routing Layers
    • 65 Ohm Controlled Impedance Signals
  • Flight Model adds npn transistors for heater control
    • Schematic updated
    • Waiting for layout modification
  • ICD: LAT-SS-01539
processor
Processor
  • BAe750 compact PCI board
      • 750 class Power-PC
      • 240 MIPS at 133 Mhz,
      • Less Than 12W
      • 128 Mbytes main memory
      • 256 Kbytes SUROM
      • Total Dose > 100 kRad (Si), Latchup Immune, SEU Rate < 1E-5 Upsets/processor-day @ 90% GEO
      • VxWorks real-time operating system
    • LAT ordered prototype, was received Spring 02
    • Since then used for software development at NRL
      • Boot-code
      • Bench-mark for LAT filtering code
      • Test with SIB MIL1553 prototype
    • Same board selected by GLAST spacecraft contractor
  • To be ordered April 03
lat spacecraft interface
LAT Spacecraft Interface
  • Power
    • 28V regulated and unregulated
  • MIL1553
    • Commanding
  • Science Interface (LVDS)
    • Transport of science data to spacecraft solid-state recorder
  • 1-PPS timing signal (LVDS)
    • Timing pulse
  • GBM GRB Candidate signal (LVDS)
    • Notification of candidate Gamma-Ray Burst (GRB), from GBM routed through SC
  • Discretes (LVDS)
    • Pulsed and level digital signals from and to spacecraft
  • Analog Monitoring
    • Temperature and voltage monitoring by SC without having LAT powered
  • Two power/signal sets: Prime and redundant
  • All agreed to: Spectrum Astro SC-LAT Interface Document

LVDS: Low-Voltage-Differential-Swing signaling

power interface to spacecraft
Power Interface to Spacecraft
  • All power feeds from spacecraft can be turned off/on via ground
  • Spacecraft turns off SIU/DAQ feeds when going to survival mode
  • LAT start-up ICD: LAT-TD-01536
    • Describes process of cold and warm boot (bring-up) of LAT
spacecraft 1 pps and grb candidate signal
Spacecraft 1-PPS and GRB Candidate Signal
  • 1-PPS signal from spacecraft prime and redundant are connected to both GASU DAQ boards (prime and redundant)
  • GASU DAQ selects which SC signal to use
  • Result is fanned out to all processor crates (SIU’s as well as EPU’s)
  • Crate DAQ selects which GASU signal to use
  • SC-LAT components are fully cross-connected
  • Same for GBM GRB candidate signal
spacecraft discrete signal
Spacecraft Discrete Signal
  • Discrete Signals from SC to LAT:
    • Discrete LVDS-signals from spacecraft prime and redundant are connected to both SIU crates (prime and redundant)
    • Reset discrete: P and R SC signal is logically Or’ed and used as CPU reset
    • Spare discretes: CPU selects whether to use P or R input and result is routed to CPU discrete inputs (3 prime and 3 redundant)
  • Discrete Signals from LAT to SC (not shown)
    • Discrete LVDS-signals from LAT SIU P and SIU R are driven to both, prime and redundant, spacecraft C&DH (Control & Data Handling) systems
lat sc science interface
LAT-SC Science Interface
  • GASU event builder
    • Directs data from TEM’s to any of the CPU’s (not shown)
    • Directs data from CPU to CPU
    • Directs data from CPU to spacecraft
  • Any CPU can direct data via either GASU DAQ (P or R) to SC
  • Data is driven to both SC sections (P and R)
    • SC needs to select which GASU to listen to
    • GASU needs to know from which SC (P or R) the flow-control line is valid
    • All configured via ground commanding
harness
Harness
  • Almost exclusively point-to-point cables (not harness)
  • Connectors are Micro-D and Sub-D
  • Cables are shielded-twisted pair, 24 AWG
  • Installation in layers; assembly drawings close to complete
  • Designed an fitted on 1:1 LAT model
verification test example tem fsw
Verification & Test: Example TEM & FSW

LCB: LAT Communication Module

Transistion-card: Trigger Module

  • Processor: Motorola Power-PC
  • Flight Software
  • PMCIA LAT Communication Board for
    • LAT Communication
  • Transition Board
    • Trigger
  • TEM DAQ Assembly
  • TEM Power-Supply Assembly
  • 28-V Supply
  • LAT-TD-00861

Power-PC Processor

Flight Software

TEM DAQ Assembly

Tower Power Supply Assembly

(1.5V/2.5V/3.3V/ 0-100V/0-150V)

28-V Power Supply

verification test rad750 sib
Verification & Test: RAD750/SIB
  • 3u-cPCI BAE RAD750 processor prototype
  • 6u-cPCI Spacecraft Interface Board (Silver Engineering)
    • MIL1553 interface
  • Flight Software
    • Boot code development
    • SIB board code driver/interface

SIB

CPU

Courtesy of Dan Wood, NRL

verification test front end data simulator
Verification & Test: Front-End Data Simulator
  • System uses 9 PC’s
    • 8 PC’s for 16 TEM’s
    • 1 PC for ACD
  • Data transported to towers via high-speed data link; PCI bridge to local bus on simulator
  • Data Simulators interface to TEM like CAL and TKR sub-system electronics
    • CAL and TKR simulator board identical except code in FPGA’s
    • Patch cable connect simulator to CAL and TKR TEM connectors
  • Can operate TEM or LAT with data generated from simulations
  • Data simulator board in layout
verification test testbed
Verification & Test: Testbed
  • Full DAQ set with EM2 hardware (each with identical interfaces and functionality as flight)
  • Incremental built according to plan (complete testbed Feb04)
  • All DAQ modules including 16 TEM’s
  • Harness like flight
  • TKR and CAL front-end electronics for 1 tower, front-end simulator boards for other 15 towers
  • Full set of ACD EM2 electronics
  • Spectrum Astro SC simulator
  • Excellent hardware and software testbed

TKR and CAL Electronics Simulators

TEM DAQ Modules TEM Power Supplies

12 ACD Electronics Cards

Spectrum Astro Simulator

verification test spacecraft interface
Verification & Test: Spacecraft Interface
  • Use Spectro-Astro provided Spacecraft Instrument Interface Simulator (SIIS)
  • Power
    • Manual off-on switch
  • Control & Data Handling (C&DH)
    • MIL1553
    • Science Interface (LVDS)
    • 1-PPS timing signal (LVDS)
    • GBM GRB Candidate signal (LVDS)
    • Discretes (CMOS)
    • Analog Monitoring
  • Present plan is for SIIS to only provide
    • Primary interface
      • can’t test prim-redundant interface response
    • Timing accuracy of 1 PPS interface not sufficient to test timing interface performance
  • Work in progress

LVDS: Low-Voltage-Differential-Swing signaling

summary
Summary
  • Flight designs for electronics components well advanced
  • Engineering models in use in EGSE test-stands
  • Flight-designs of DAQ ASIC’s submitted to fabrication
  • Component verification and test plans described
  • To be worked on:
    • Worst-case & timing analysis plus test-procedures for several modules still need to be completed
    • EM2 tests (multi-tower with GASU) scheduled to be started end of April 03
    • Documents still need to be completed
  • The electronics is ready to purchase flight components/hardware
trigger path
Trigger Path
  • TKR, CAL, and ACD produce fast (< 700 ns) trigger input signals from their front-end comparators
    • CAL, LO and HI discriminator signals
      • LO is used as monitor trigger for TKR
      • HI is used for very high energy (>10GeV) events
    • TKR, Layer OR
    • ACD, LO and HI discriminator signals
      • LO is efficient for minimum ionizing particles
      • HI selects CNO events
  • TEM produces sub-system specific trigger primitives for CAL & TKR (e.g. 3-in-a-row)
  • Global Trigger in GASU receives trigger inputs from ACD and TEM’s and decides whether to trigger the instrument
  • If instrument is triggered, Trigger Accept signal is distributed back to front-ends -> Event data is generated
  • Total time from particle in detector to receipt of trigger accept signal: < 2 usec

16 Towers

TKR

CAL

TEM

GASU

( includes Global Trigger)

Trigger Inputs

Trigger Accept

ACD

event data path
Event Data Path
  • Event data from CAL & TKR are acquired by TEM’s, reformatted, buffered, and transmitted via GASU to all Processor Units (for ACD the TEM function is included in the GASU)
  • EPU’s assemble LAT events and filter the data to reduce the event rate of ~6 KHz down to ~30 Hz
  • Events arriving at EPU’s have target EPU ID in header, so each EPU only processes sub-set of events and forwards filtered events via GASU to other processors or spacecraft solid-state recorder
  • All pipe-line stages subject to flow-control
  • Dead-time is monitored on an event-by-event basis

Towers

TKR

CAL

EPU/SIU

TEM

Data to Spacecraft

GASU

Event Data

ACD

datapath building events
Datapath & Building Events

Event Processing Unit (EPU)

Tower

TEM

Front-End

Processor

Event Builder

Latch on trigger

Cable

~50,000 TKR GTFE MEM Cells

TKR FIFO

With 1 Event

With 2 Events

Accept/Reject

SW Filter

Assemble TEM Event

Spacecraft

Digitize on trigger

CAL ADC Data

Assemble LAT Event

From other TEM’s

CAL-TRG FIFO

Trigger Data

With 3 Events

FIFO for each Tower

ad