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Programmable Logic Controllers (PLCs)

Programmable Logic Controllers (PLCs). Counters as Sequence Generators Arbitrary Sequence Generators Sequence Generators with different state durations. Ladder Implementation of Sequence Generators. Positive Edge Detection. A modulo-4 up counter.

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Programmable Logic Controllers (PLCs)

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  1. Programmable Logic Controllers (PLCs) • Counters as Sequence Generators • Arbitrary Sequence Generators • Sequence Generators with different state durations Ladder Implementation of Sequence Generators Sequence Generators

  2. Positive Edge Detection Sequence Generators

  3. A modulo-4 up counter • The counter should increment on each false-to-true transition of the input switch. Sequence Generators

  4. A modulo-4 up counter (Ladder Diagram) Positive Edge Detection If Present St. =00 then Next St. =01 Latch O0 (O1 remains 0) If Present St. =01 then Next St. =10 Latch O1 and Unlatch O0 If Present St. =10 then Next St. =11 Latch O0 (O1 remains 0) If Present St. =11 then Next St. =00 Unlatch O1 and Unlatch O0 Count Up Next State (NS) Present State (PS) Sequence Generators

  5. A modulo-4 up counter (Free Running, frequency – scan frequency) • The counter should increment at the frequency of the PLC scan cycle, only if the input switch is closed. Sequence Generators

  6. A modulo-4 up counter (Free Running, frequency – scan frequency) Generate Clock pulse If Present St. =00 then Next St. =01 Latch O0 (O1 remains 0) If Present St. =01 then Next St. =10 Latch O1 and Unlatch O0 If Present St. =10 then Next St. =11 Latch O0 (O1 remains 0) If Present St. =11 then Next St. =00 Unlatch O1 and Unlatch O0 Clock Count Enable Next State (NS) Present State (PS) Sequence Generators

  7. Modulo-4 counter with 0.25 Hz frequency • The counter should increment at a 0.25Hz frequency, only if the input switch is closed. Generate Clock pulse (f=0.25Hz) If Present St. =00 then Next St. =01 Latch O0 (O1 remains 0) If Present St. =01 then Next St. =10 Latch O1 and Unlatch O0 If Present St. =10 then Next St. =11 Latch O0 (O1 remains 0) If Present St. =11 then Next St. =00 Unlatch O1 and Unlatch O0 Sequence Generators

  8. Mod-4 simplified • To simplify the ladder diagram • Modify rungs to have only one output • Group together all rungs that Latch (Unlatch) the same output • Replace a group of rungs with a single one, removing the inputs that appear as both Check if Open and Check-if-Closed (X + X’ = 1) Sequence Generators

  9. 01 10 00 11 Mod-4 Formal Design • A formal way for obtaining the ladder diagram is by using the excitation table of the SR latch Sequence Generators

  10. 01 11 00 10 Examples • Design a 2-bit Gray Code generator (0  1  3  2) with a 4 second time delay between states Sequence Generators

  11. Sequence Generators (with varying delays between states) Sequence Generators

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