Memory

1. Memory DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

2. Memory Technology Types • Read Only Memory (ROM) • Programmable ROM (PROM) • Erasable Programmable ROM (EPROM) • Electrically Erasable Programmable ROM (EEPROM) • Flash Memory • Random Access Memory (RAM) • Static RAM (SRAM) • Dynamic RAM (DRAM) DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

3. Read Only Memory (ROM) • Read Only • Permanent (non-volatile storage) • Secured against accidential/malicious changes • Used to store system level programs (ex system BIOS) • ROM uses a diode to connect the lines if the value is 1. If the value is 0, then the lines are not connected at all. • Creation is time consuming and expensive for small quantities • They use very little power, are extremely reliable • ROM ~ CD-ROM • Relative modifiability: PROM,EPROM, EEPROM DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

4. Programmable ROM (PROM) • Blank PROM chips can be bought inexpensively and coded by anyone with a special tool called a programmer. • Initial all “fused”, all “1” • Higher current breaks fuse -> “0” • Only once • More fragile than ROMs (static electricity) • Inexpensive => prototyping for ROM’s • PROM ~ CD-R • Burning the PROM: DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

5. Erasable Programmable ROM (EPROM) • EPROM = Large Array of Floating Gate Transistors DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

6. Erasable Programmable ROM (EPROM) • Can be rewritten more than once • To erase, chip must be removed • To rewrite, erase first , no incremental changes (break through negative elektrons blocking the floating gate). • UV Light at a frequency of 253,7 Hz • Erase is not selective, entire EPROM is erased. • Over-Erased • 30 year old technology ! • EPROM ~ CD-RW DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

7. EEPROMS & Flash Memory • Overcome the biggest drawbacks of EPROMs • Chip does not have to be removed to be rewritten • No full erase to change a specific portion • Changing the contents does not require additional dedicated equipment • Versatile but slow to re-program (one byte) • Flash Memory, write data in chuncks (512 bytes) • Flash BIOS DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

8. Random Access Memory (RAM) • Better name RWM: Read Write Memory • Volatile storage, no power no data • Solution: battery backed memory (RAID) • Much faster than ROM • Shadow the BIOS ROM • Static RAM (SRAM) • Dynamic RAM (DRAM) DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

9. Static RAM (SRAM) • Flip-flop holds each bit of memory • 6 transistors per cell + some wiring • No refreshing logics • Faster than DRAM • Takes more space on a chip than DRAM • Less memory per chip => more expensive • Usage: cache memory (speed-sensitive) DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

10. Dynamic RAM • Memory Cell (1 bit)= Transistor + capacitor • Capacitor holds the information bit (0 or 1) • Transistor acts as a switch to let the control circuitry on the memory chip read the capacitor or change its state • Problem: Capacitor has a leak. Capacitor empties in only a few milliseconds. • Memory controller must recharge all capacitors holding a 1 before they discharge: read memory and write it right back thousands of times per second. • Downside: refreshing slows down the memory DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

11. Dynamic RAM • Memory cells alone would be worthless without some way to get information in and out of them. So the memory cells have a whole support infrastructure of other specialized circuits. These circuits perform functions such as: • Identifying each row and column (row address select and column address select: RAS & CAS) • Keeping track of the refresh sequence (counter) • Reading and restoring the signal from a cell (sense amplifier) • Telling a cell whether it should take a charge or not (write enable) • Other functions of the memory controller include a series of tasks that include identifying the type, speed and amount of memory and checking for errors. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

12. Dynamic RAM: SIPP/SIMM • 30 pin SIPP (Single Inline Pin Package): • SIMM 30-Pin (8-bit wide) or 72-Pin (32-bit wide) (Single in-line memory module). 8 or 9 RAM chips, usually FPM or EDO: DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

13. Dynamic RAM: FPM/EDO • Fast page mode or FPM memory is slightly faster than conventional DRAM. While standard DRAM requires that a row and column be sent for each access, FPM works by sending the row address just once for many accesses to memory in locations near each other, improving access time. • EDO (Extended Data Output), fetches next block of memory while sending the previous to the CPU. (Hyper Page Mode RAM) Must be supported by the chipset ! • SIMM: Asysnchronous => max speed 66MHz DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

14. Dynamic RAM: DIMM • DIMM (dual in-line memory module) a small circuit board that holds memory chips. • A single in-line memory module (SIMM) has a 32-bit path to the memory chips whereas a DIMM has 64-bit path. • Another difference is that DIMMs have separate electrical contacts on each side of the module, while the contacts on SIMMs on both sides are redundant. • Because the Pentium processor requires a 64-bit path to memory, you need to install SIMM's two at a time. With DIMM's, you can install memory one DIMM at a time. A DIMM contains 168 pins. • SPD (Serial Presence Detect): additional chip on memory module which contains information about the module type, capacity and speed. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

15. Dynamic RAM: DIMM DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

16. Dynamic RAM: SDRAM • SDRAM Short for Synchronous DRAM, a type of DRAM that can run at much higher clock speeds than conventional memory. • SDRAM actually synchronizes itself with the CPU's bus and is capable of running at 133 MHz, about three times faster than conventional FPM RAM, and about twice as fast EDO DRAM. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

17. Dynamic RAM: DDR SDRAM • DDR SDRAM Short for Double Data Rate-Synchronous DRAM. • SDRAM that supports data transfers on both edges of each clock cycle, effectively doubling the memory chip's data throughput. • DDR-SDRAM is also called SDRAM II. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

18. Dynamic RAM: DDR SDRAM • DDR SDRAM Chart DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

19. Dynamic RAM: DDR2-SDRAM • DDR2-SDRAM Short for Double Date Rate Synchronous DRAM 2 is the newer type of DDR that supports higher's speeds than it's predecessor DDR SDRAM. Operates at 1,8 Volts (Less Power, less heat). DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

20. Dynamic RAM: DDR2-SDRAM DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

21. DDR-3 SDRAM • 17% less power consumption than DDR2 • 1,5 Volt • 90nm technology • 240 pins (=DDR2), same size • Electrically incompatible • Different notch location DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

22. Dynamic RAM: RDRAM • RDRAM is developed from the traditional DRAM, but the architecture is completely new. It has been streamed and optimized to yield new performance. The RAMBUS-design gives a more intelligent access to the RAM, meaning that units can "prefetch" data and this way free the CPU some work. The idea is that data is read in small packets at a very high clock speed (pipelining: four 16-bit packets in one operation). • The RIMMs (Rambus Inline Memory Module) are only 16(32)bit wide compared to the traditional 64 bit SDRAM DIMMs, but they work at a much higher clock frequency: • The Rambus modules work on 2.5 volts, which internally is reduced down to 0.5 volt when possible. This helps to reduce heat and radio signals. • The RIMMs hold controlling chips that turns off the power to sections not in use. They can also reduce the memory speed if thermal sensors report of overheating. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

23. Dynamic RAM: RDRAM • RDRAM includes a memory controller on each memory chip, significantly increasing manufacturing complexity compared to SDRAM, which used a single memory controller located on the northbridge chipset. RDRAM was also two to three times the price of PC-133 SDRAM due to a combination of high manufacturing costs and high license fees.[citation needed] • When installing multiple RIMMs on a memory channel, performance impact is greater than SDRAM design because the chips in the further memory module has to travel across all memory chips installed physically closer to the memory controller, instead of just 1 or 2 chips in production SDRAM motherboards. • The design of many common Rambus memory controllers dictated that memory sticks be installed in sets of two. Any remaining open memory slots must be filled with CRIMMs. These sticks provide no extra memory, and only served to propagate the signal to termination resistors on the motherboard instead of providing a dead end where signals would reflect. • With the introduction of the i840 (Pentium III), Intel 850 (Pentium 4), Intel 860 (Pentium 4 Xeon) chipsets, Intel added support for dual-channel PC-800 RDRAM, doubling bandwidth to 3200 MB/s by increasing the bus width to 32-bit. This was followed in 2002 by the i850E chipset, which introduced PC-1066 RDRAM, increasing total dual-channel bandwidth to 4200 MB/s. Then in 2002, Intel released the E7205 Granitebay chipset, which introduced dual-channel DDR support for a total bandwidth of 4200 MB/s, at a slightly lower latency than competing RDRAM. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

24. Dynamic RAM: RDRAM • CRIMMs • All RAM slots have to be full, with RAMBUS we have to fill in blank modules in slots which are not in use. The blank modules are called CRIMMs (with a 'C' for continuity). The RIMM modules hold 184 pins. • Sensitivity • The RDRAM chips have to be placed very close to the CPU to reduce radio noise. This indicates, that RIMM technology is rather sensitive; Intel seems to have made that discovery as well. • During 1999 and 2000, Rambus was not very successful. In fact, Intel has suffered a serious set-back due to their commitment to the Rambus design. The chip set i820 "Camino" became a little disaster. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

25. Dynamic RAM: RDRAM • HEAT • SDRAM: Workload is spread among the chips fairly evenly. • RDRAM: often one chip is doing all the work • RIMM itself can get as hot as 93°C • Heat spreader (very low-end heatsink) spreads out a minor portion of the heat that radiates outwards to a broader surface area. • Most of the heat goes into the motherboard ! • Motherboard design must be changed: • Size of the board • Number and thickness of copper layers (six layers) • 2-ounce copper on the ground plane DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

26. Dynamic RAM: RDRAM • RDRAM chart DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

27. DDR2-SDRAM  RDRAM • RDRAM is a narrow, high speed serial connection. • SDRAM/DDR is a wider, lower speed parallel connection. (DDR is simply SDRAM that squeezes out two actions per clock cycle; something RDRAM already does. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

28. Dynamic RAM: Registered • Registered memory modules have build-in registers on their address and control lines • Register = small temporary holding area (usually 64bit) for data. • These registers act as buffers between the CPU and the memory. • Increases system reliability, but also slows the system down a very slight bit as data must travel through these registers ( 2 ~5% ) • Some systems do not support registered memory, others require registered memory, and many more give you the option to use registered or unregistered memory. • The use of registered memory is recommended for server-class systems. • Registered memory is also know as buffered memory. Unregistered memory as also known as unbuffered memory. DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst

29. Sources • Kingston, The Ultimate Memory Guide http://www.kingston.com/tools/umg/default.asp • http://www.handson.ca/ram2.html • http://computer.howstuffworks.com/ram.htm • http://www.karbosguide.com/hardware/module2e4.htm DE NAYER INSTITUUT Hogeschool voor Wetenschap & Kunst