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Mike Vahey / John Granacki Raytheon / USC-ISI September 29, 2004

Reconfigurable Computing MONARCH/MCHIP High Efficiency Embeddable TeraFlops Polymorphous Computing Architecture. Mike Vahey / John Granacki Raytheon / USC-ISI September 29, 2004. MO rphable N etworked micro- ARCH itecture. E x ogi. DIFLs. DIFLs. Memory Interface. XPIRX. RIO. P. P.

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Mike Vahey / John Granacki Raytheon / USC-ISI September 29, 2004

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  1. Reconfigurable Computing MONARCH/MCHIP High Efficiency Embeddable TeraFlops Polymorphous Computing Architecture Mike Vahey / John Granacki Raytheon / USC-ISI September 29, 2004 MOrphable Networked micro-ARCHitecture Exogi

  2. DIFLs DIFLs MemoryInterface XPIRX RIO P P P P CM P P ED ED ROMPort R R DIFLs DIFLs P P ED ED R R DIFLs DIFLs P P ED ED R R DIFLs DIFLs P P P MemoryInterface XPIRX DIFLs DIFLs MONARCH System on a ChipRISC, DRAM, Computing Array, Streaming I/O • Polymorphous Architecture • Multiple programming modes • Reconfigurable, streaming DF • RISC scalar • RISC SIMD (Altivec like) • 6 RISC processors • Reconfigurable Computing • 96 adders fixed and float • 96 multipliers • 124 dual port memories • 248 address generators • 12 MBytes on chip DRAM • 14 DMA engines • RapidIO interface • 20 DIFL ports (1.3 GB/s ea) • Power 8-50 W (nominal) • Throughput 64 GFLOPS peak • Alternative to ASICS or custom hardware • Demonstrated for RADAR, COM, EO • Late algorithm freeze – retains programmability • Energy efficiency: 3-6 GFLOPS/W

  3. Development Station • Compiler • Simulator • Component SW • Libraries Application Development Environment & Workstation Multiple Computing Modes adapt to application needs: 1) RISC Scalar, 2) Wide Word, 3) Reconfigurable Data Flow Application SCEApplication HLC Exogi RISC/WW LLC Dataflow LLC Application MachineModel LLC Metadata Assembler Assembler / Router HLCMetadata Build SCE Components Component Metadata DataflowBinary RISCBinary Application Repository Component Repository Static Linker/Loader SCE/RTEMS

  4. Throughput for Kernels Coded 8.00E+9 7.00E+9 6.30E+9 6.00E+9 5.00E+9 4.30E+9 4.00E+9 Throughput (Flop/s/watts) 3.26E+9 3.00E+9 2.00E+9 1.00E+9 000.00E+0 FIR SVD CFAR Kernel MONARCH Performance on Lincoln Lab Benchmark Suite Near Peak Performance with balanced Add/Multiply 64 GFLOPS 58 39 33 Throughput GFLOPS FIR SVD Kernel CFAR 6.3 4.3 GFLOPS/Watt 3.2 FIR SVD Kernel CFAR

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