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Buses and INterconnects. “CPU bus” or “System bus”. “Bus interface”. “I/O bus”. CPU-Memory-I/O Architecture. Memory. CPU. I/O module. I/O device. I/O Buses and Interfaces. There are many “standards” for I/O buses and interfaces Standards allow “open architectures”

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Presentation Transcript
Buses and interconnects

Buses and INterconnects


Cpu memory i o architecture

“CPU bus”

or

“System bus”

“Bus interface”

“I/O bus”

CPU-Memory-I/O Architecture

Memory

CPU

I/O module

I/O device


I o buses and interfaces
I/O Buses and Interfaces

  • There are many “standards” for I/O buses and interfaces

  • Standards allow “open architectures”

    • Many vendors can provide peripheral (I/O) devices for many different systems

  • Most systems support several I/O buses and I/O interfaces


Examples
Examples

  • Expansion buses or “slots”

  • Disk interfaces

  • External buses

  • Communications interfaces


Expansion buses
Expansion Buses

  • These are “slots” on the motherboard

  • Examples

    • ISA – Industry Standard Architecture

    • PCI – Personal Component Interconnect

    • EISA – Extended ISA

    • SIMM – Single Inline Memory Module

    • DIMM – Dual Inline Memory Module

    • MCA – Micro-Channel Architecture

    • AGP – Accelerated Graphics Port

    • VESA – Video Electronics Standards Association

    • PCMCIA – Personal Computer Memory Card International Association (not just memory!)


3 ISAslots

Pentium CPU

6 SIMMslots

2 DIMM slots

5 PCI slots


Examples1
Examples

  • Expansion buses or “slots”

  • Disk interfaces

  • External buses

  • Communications buses


Disk interfaces
Disk Interfaces

  • Examples

    • ATA – ATAttachment (named after IBM PC-AT)

    • IDE – Integrated Drive Electronics (same as ATA)

    • Enhanced IDE

      • Encompasses several older standards (ST-506/ST-412, IDE, ESDI, ATA-2, ATA-3, ATA-4)

    • Floppy disk

    • SCSI – Small Computer Systems Interface

    • ESDI – Enhanced Small Device Interface (mid-80s, obsolete)

    • PCMCIA - Personal Computer Memory Card International Association (not just memory!)


Examples2
Examples

  • Expansion buses or “slots”

  • Disk interfaces

  • External buses

  • Communications buses


External buses
External Buses

  • Examples

    • Parallel – sometimes called LPT (“line printer”)

    • Serial – typically RS232C (sometimes RS422)

    • PS/2 – for keyboards and mice

    • USB – Universal Serial Bus

    • IrDA – Infrared Device Attachment

    • FireWire – new, very high speed, developed by IEEE


Examples3
Examples

  • Expansion buses or “slots”

  • Disk interfaces

  • External buses

  • Communications buses


Communications buses
Communications Buses

  • For connecting systems to systems

  • Parallel/LPT

    • special purpose, e.g., using special software (Laplink) to transfer data between systems

  • Serial/RS232C

    • To connect a system to a voice-grade modem

  • Ethernet

    • To connect a system to a high-speed network


A detailed look
A Detailed Look

  • Let’s look at a few of the preceding examples in more detail

    • ISA

    • PCI

    • AGP

    • Serial

    • Parallel

    • SCSI

    • Ethernet


Isa 1 of 3
ISA (1 of 3)

  • Industry Standard Architecture

    • pronounced “eye-es-eh”

  • History

    • Originally introduced in the IBM PC (1981) as an 8 bit expansion slot

      • Runs at 8.3 MHz with data rate of 7.9 Mbytes/s

    • 16-bit version introduced with the IBM PC/AT

      • Runs at 15.9 MHz with data rate of 15.9 Mbytes/s (?)

      • Sometimes just called the “AT bus”

    • Today, all ISA slots are 16 bit

  • Configuration

    • Parallel, multi-drop

p. 180


Isa 2 of 3
ISA (2 of 3)

  • Used for…

    • Just about any peripheral (sound cards, disk drives, etc.)

  • PnP ISA

    • In 1993, Intel and Microsoft introduced “PnP ISA”, for plug-and-play ISA

    • Allows the operating system to configure expansion boards automatically

  • Form factor

    • Large connector in two segments

    • Smaller segment is the 8-bit interface (36 signals)

    • Larger segment is for the 16-bit expansion (62 signals)

    • 8-bit cards only use the smaller segment


Isa 3 of 3
ISA (3 of 3)

  • Advancements

    • EISA

      • Extended ISA

      • Design by nine IBM competitors (AST, Compaq, Epson, HP, NEC, Olivetti, Tandy, WYSE, Zenith)

      • Intended to compete with IBM’s MCA

      • EISA is hardware compatible with ISA

    • MCA

      • Micro Channel Architecture

      • Introduced by IBM in 1987 as a replacement for the AT/ISA bus

    • EISA and MCA have not been successful!


A detailed look1
A Detailed Look

  • Let’s look at a few of the preceding examples in more detail

    • ISA

    • PCI

    • AGP

    • Serial

    • Parallel

    • SCSI

    • Ethernet


PCI

  • Peripheral Component Interconnect

    • Also called “Local Bus”

  • History

    • Developed by Intel (1993)

    • Very successful, widely used

    • Much faster than ISA

    • Gradually replacing ISA

  • Configuration

    • Parallel, multi-drop


PCI

  • Used for…

    • Just about any peripheral

    • Can support multiple high-performance devices

    • Graphics, full-motion video, SCSI, local area networks, etc.

  • Specifications

    • 64-bit bus capability

    • Usually implemented as a 32-bit bus

    • Runs at 33 MHz or 66 MHz

    • At 33 MHz and a 32-bit bus, data rate is 133 Mbytes/s


Pci local bus specification
PCI Local Bus Specification:

  • PCI version 1.0 was developed by Intel in 1991 but not released by a Standards body.

  • PCI revision 2.0; released in 1993; 32-bit, 33MHz bus.

  • PCI revision 2.1; released in 1995; 32-bit, 33MHz / 64-bit, 66MHz, Universal PCI for 3.3v or 5v cards

  • PCI revision 2.2; released 1998; minor clarifications / enhancements.

  • PCI revision 2.3; released in 2002; removed 5v only cards

  • PCI revision 3.0; released in 20xx; removed 5 volt interfaces altogether.

PCI-X: The latest version 64 bits at: PCI-X 66, PCI-X 133, PCI-X 266 and PCI-X 533 [4.3GBps]


Pci express
PCI express

  • PCI Express is the new serial bus addition to the PCI series of specifications. How ever the electrical and mechanical interface for PCI Express is not compatible with the PCI bus interface. This is a serial bus which uses two low-voltage differential LVDS pairs, at 2.5Gb/s in each direction [one transmit, and one receive pair]. A PCI Express link is comprised of these two unidirectional differential pairs each operating at 2.5Gbps to achieve a basic over all throughput of 5Gbps [before accounting for over-head].


Pci express protocol
PCI Express Protocol

  • The frame format for PCIe is shown in the graphic below. The frame is made up of a 1-byte Start-of-Frame, 2-byte Sequence Number, 16 or 20-byte Header, 0 to 4096-byte Data field, 0 to 4-byte ECRC field, 4-byte LCRC, and 1-byte End-of Frame. The smaller the number of bits transferred in the data field the greater the over-head becomes. A zero byte data field results in a 100 percent over-head, because no data was transferred.



A detailed look2
A Detailed Look

  • Let’s look at a few of the preceding examples in more detail

    • ISA

    • PCI

    • AGP

    • Serial

    • Parallel

    • SCSI

    • Ethernet


AGP

  • Accelerated Graphics Port

  • History

    • First appeared on Pentium II boards

    • Developed just for graphics (especially 3D graphics)

  • Configuration

    • Parallel, point-to-point (only one AGP port / system)

  • Specifications

    • Data rates up to 532 Mbytes/s (that’s 4x PCI!)


Available versions
Available Versions

AGP 1x, using a 32-bit channel operating at 66 MHz resulting in a maximum data rate of 266 megabytes per second (MB/s); 3.3 V signaling.

AGP 2x, using a 32-bit channel operating at 66 MHz double pumped to an effective 133 MHz resulting in a maximum data rate of 533 MB/s; signaling voltages the same as AGP 1x.

AGP 4x, using a 32-bit channel operating at 66 MHz quad pumped to an effective 266 MHz resulting in a maximum data rate of 1066 MB/s (1 GB/s); 1.5 V signaling.

AGP 8x, using a 32-bit channel operating at 66 MHz, strobing eight times per clock, delivering an effective 533 MHz resulting in a maximum data rate of 2133 MB/s (2 GB/s); 0.8 V signaling.


Identifying isa pci agp slots

AGP slot

Back ofcomputer

PCI slot

ISA slot

Identifying ISA, PCI, & AGP slots

  • Here’s an image to help in identifying slots


A detailed look3
A Detailed Look

  • Let’s look at a few of the preceding examples in more detail

    • ISA

    • PCI

    • AGP

    • Serial

    • Parallel

    • SCSI

    • Ethernet


Serial interfaces
Serial Interfaces

  • On PCs, a “serial interface” implies a “COM port”, or “communications port”

    • COM1, COM2, COM3, etc.

  • COM ports conform to the RS-232C interface standard, so…


Rs 232c
RS-232C

  • History

    • Well-established standard, developed by the EIA (Electronics Industry Association) in 1960s

    • Originally intended as an electrical specification to connect computer terminals to modems

  • Defines the interface between a DTE and a DCE

    • DTE = Data Terminal Equipment (terminal)

    • DCE = Data Communications Equipment (modem)

    • A “modem” is sometimes called a “data set”

    • A “terminal” is anything at the “terminus” of the connection

      • VDT (video display terminal), computer, printer, etc.


Traditional configuration

DTE

DCE

DCE

DTE

Telephonenetwork

RS-232C

RS-232C

“Traditional” Configuration


Rs 232c specifications
RS-232C Specifications

  • Data rate

    • Maximum specified data rate is 20 Kbits/s with a maximum cable length of 15 meters

    • However…

      • It is common to “push” an RS-232C interface to higher data rates

      • Data rates to 1 Mbit/s can be achieved (with short cables!)

  • Configuration

    • Serial, point-to-point


Serial data transmission
Serial Data Transmission

  • Two modes

    • Asynchronous

      • The transmitting and receiving devices are not synchronized

      • A clock signal is not transmitted along with the data

    • Synchronous

      • The transmitting and receiving devices are synchronized

      • A clock signal is transmitted along with the data (and is used to synchronized the devices)

    • Most (but not all) RS-232C interfaces are asynchronous!


Asynchronous data transmission
Asynchronous Data Transmission

  • Data are transmitted on the TD (transmit data) line in packets, typically, of 7 or 8 bits

  • Each packet is “framed” by a “start bit” (0) at the beginning, and a “stop bit” (1) at the end

  • Optionally, a “parity bit” is inserted at the end of the packet (before the stop bit)

  • The parity bit establishes either “even parity” or “odd parity” with the data bits in the packet

    • E.g., even parity: the total number of bits “equal to 1” (including the data bits and the parity bit) is an “even number


1 s and 0 s in rs 232c
1’s and 0’s in RS-232C

  • A “1” is called a “mark”

  • A “0” is called a “space”

  • The idle state for an RS-232C line is a 1 (“mark”)

    • Idle state is called “marking the line”

  • Voltages on an RS-232C line

    • Well… that’s another story, and it’s not really a concern to us


Data transmission example

Idlestate

Idle

state

Startbit

Stopbit

  • ASCII character ‘a’

  • 7 bits

  • LSB first

Paritybit

Data Transmission Example

  • Plot of the asynchronous RS-232C transmission of the ASCII character ‘a’ with odd parity:

TD

time


Rs 232c connectors

  • Note:

  • P = “pin”

  • Sometimes called a “male” connector

  • The mate for this is a DP25S, or “socket” connector – the “female”

RS-232C Connectors

  • The original standard specified a 25-pin connector

  • Today, a 9-pin connector is more common

  • E.g.,

DB9P


Rs 232c connectors1

Pin 1

Pin 1

Pin 1

Pin 1

Where are pins 2, 3, 4, etc.?

RS-232C Connectors

DB25P

DB25S

DB9P

DB9S

Where is pin 1?


Rs 232c pins signals directions
RS-232C Pins, Signals, Directions

Pin

DB25

1

2

3

4

5

6

7

8

20

22

DB9

2

3

7

8

6

5

1

4

9

Signal Name

CD Chassis Ground

TD Transmit Data

RD Receive Data

RTS Request To Send

CTS Clear To Send

DSR Data Set Ready

SG Signal Ground

DCD Data Carrier Detect

DTR Data Terminal Ready

RI Ring Indicator

Direction

-

DTE  DCE

DTE  DCE

DTE  DCE

DTE  DCE

DTE  DCE

-

DTE  DCE

DTE  DCE

DTE  DCE


Universal serial bus usb
Universal Serial Bus (USB)

  • A serial standard for connecting devices.

  • Up to 127 devices can be connected to the USB bus.

  • USB current standard is USB 2.0 which supports a transfer rate of 480Mbps.


Usb connectors and hubs
USB Connectors and Hubs

USB A and B female connector

USB Hub

USB male A connector

USB male B connector


USB

  • The USB bus is a [Differential] Bi-directional serial interface cable bus. Differential NRZI data is transmitted Isochronous or Asynchronous between devices. Data is transferred at three different rates over a maximum cable length of 4 meters ~ over 4 wires, 2 of which carry data on a balanced twisted pair.

  • USB 3.0 (Super-Speed USB) increases the data rate to 4.8 Gbit/s, 600 MB/s. USB 3.0 ports and cabling are designed to enable backward compatibility, so the new connector and cable contains both a USB 3.0 interface and a USB 2.0 interface.


NRZ

  • "A type of 'null' encoding, where a logical 'zero' is represented by a particular line state, and a logical 'one' by another. In other words, there is no encoding, as distinct from RZ encoding." NRZ is used with RS-232 and CANbus.


A detailed look4
A Detailed Look

  • Let’s look at a few of the preceding examples in more detail

    • ISA

    • PCI

    • AGP

    • Serial

    • Parallel

    • SCSI

    • Ethernet


Parallel interfaces
Parallel Interfaces

  • History

    • In the context of PCs, a “parallel interface” implies a Centronics-compatible printer interface

    • Originally developed by printer company, Centronics

    • Introduced on the IBM PC (1981) as an LPT (“line printer”) port

    • Improvements

      • EPP (Enhanced Parallel Port), development by Intel, Xircom, Xenith

      • Enshrined in the standard IEEE-1284 (1994)

        • “Standard Signaling Method for a Bi-directional Parallel Peripheral Interface for Personal Computers”

        • Includes Centronics/LPT mode, EPP mode, and…

        • ECP mode (Enhanced Capability Port)


Parallel interfaces1
Parallel Interfaces

  • Data Rate

    • 150 Kbytes/s (LPT) to 1.5 Mbytes/s (ECP)

  • Configuration

    • Parallel, point-to-point


Typical printer cable
Typical Printer Cable

  • Centronics male

  • 36 pins

  • Connects to printer

  • DB25P (male)

  • Connects to PC


Pinouts
Pinouts

Direc-

tion

out

out

out

out

out

out

out

out

out

in

in

in

in

out

in

out

out

-

DB25Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18-25

Cent.Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

32

31

36

19-30,

33,17,16

Signal

/Strobe

Data0

Data1

Data2

Data3

Data4

Data5

Data6

Data7

/Ack

Busy

PaperEnd

SelectIn

/AutoFd

/Error

/Init

/Select

Ground

Function

low pulse (>0.5 µs) to send

LSB

.

.

.

.

.

.

MSB

Low pulse ack. (~5 µs)

High for busy/offline/error

High for out of paper

High for printer selected

Low to autofeed one line

Low for Error

Low pulse (>50 s) to init

Low to select printer

-


A detailed look5
A Detailed Look

  • Let’s look at a few of the preceding examples in more detail

    • ISA

    • PCI

    • AGP

    • Serial

    • Parallel

    • SCSI

    • Ethernet


Scsi 1 of 2
SCSI (1 of 2)

  • Small Computer Systems Interface

    • pronounced “scuzzy”

  • History

    • Developed by Shugart Associates (1981)

    • Originally called Shugart Associates Systems Interface (SASI, pronounced “sassi”)

    • Scaled down version of IBM’s System 360 Selector Channel

    • Became an ANSI standard in 1986

  • Used for…

    • Disk drives, CD-ROM drives, tape drives, scanners, printers, etc.

p. 232


Scsi 2 of 2
SCSI (2 of 2)

  • Configuration

    • Parallel, daisy chain

    • Requires terminator at end of chain

  • Versions (data width, data rate)

    • SCSI-1, Narrow SCSI (8 bits, 5 MBps)

    • SCSI-2 (8, bits 10 MBps)

    • SCSI-3 (8, bits, 20 MBps)

    • UltraWide SCSI (16 bits, 40 MBps)

    • Ultra2 SCSI (8 bits 40 MBps)

    • Wide Ultra2 SCSI (16 bits, 80 MBps)


Scsi block diagram

System bus

or

I/O bus

SCSI port

SCSI bus

Terminator

SCSI Block Diagram

SCSI bus controller

I/O device

I/O device

I/O device


Scsi connectors

Narrow SCSI

50 pins

FastSCSI

50 pins

Fast Wide SCSI

68 pins

Ultra SCSI

80 pins

SCSI Connectors


Putting it all together
Putting it all together

LPTport

COM1port

COM2port

SCSIport

Parallelinterface

Serialinterface

SCSI

interface

ISA or PCI bus interface

CPU/systembus

ISA or PCIbus


A detailed look6
A Detailed Look

  • Let’s look at a few of the preceding examples in more detail

    • ISA

    • PCI

    • AGP

    • Serial

    • Parallel

    • SCSI

    • Ethernet


Ethernet interfaces
Ethernet Interfaces

  • History

    • In 1980, Xerox, Digital Equipment Corporation (DEC, now Compaq), and Intel published a specification for an “Ethernet” LAN (local area network)

    • Now exists as a standard - IEEE 802.3

      • Physical interface uses either coax cable with BNC connectors or twisted pair cable with RJ-45 connectors (10Base-T)

    • Fast Ethernet

      • Specified in IEEE 802.3u (100Base-TX)


Ethernet interfaces1
Ethernet Interfaces

  • Data Rate

    • 10 Mbits/s for Ethernet (10Base-T)

    • 100 Mbits/s for Fast Ethernet (100Base-TX)

  • Configuration

    • Serial, multi-point (token ring or token bus)




Ethernet adapter example pci
Ethernet Adapter Example - PCI

Addtron

AEF-360TX

RJ-45connector

BNCconnector

PCIbus interface


Rj 45 pinouts
RJ-45 Pinouts

  • Pin Signal Direction Function

  • 1 TD+  Transmit data

  • TD-  Transmit data return

  • RD+  Receive data

  • - - -

  • - - -

  • RD-  Receive data return

  • - - -

  • - - -

1

8



Osi and protocol stack

OSI Model

TCP/IP Hierarchy

Protocols

7th

Application Layer

6th

Presentation Layer

Application Layer

5th

Session Layer

4th

Transport Layer

Transport Layer

Network Layer

3rd

Network Layer

2nd

Link Layer

Link Layer

1st

Physical Layer

OSI: Open Systems Interconnect

OSI and Protocol Stack

Link Layer : includes device driver and network interface card

Network Layer : handles the movement of packets, i.e. Routing

Transport Layer : provides a reliable flow of data between two hosts

Application Layer : handles the details of the particular application


Packet encapsulation
Packet Encapsulation

  • The data is sent down the protocol stack

  • Each layer adds to the data by prepending headers

22Bytes

20Bytes

20Bytes

4Bytes

64 to 1500 Bytes


Ethernet
Ethernet

  • Computer <-> Computer communication on same network

  • Each device has unique MAC address (48-bit)

    example: 00-C0-4F-48-47-93

Ethernet Packet:

Dest.

address

Source

address

Type

Preamble

Data

CRC

8bytes

6bytes

6bytes

2bytes

64 - 1500bytes

4bytes

MAC: Media Access Control


Arp address resolution protocol
ARP : Address Resolution Protocol

  • ARP provides mapping

    32bit IP address <-> 48bit MAC address

    128.97.89.153 <-> 00-C0-4F-48-47-93

  • ARP cache

    maintains the recent mappings from IP addresses to MAC addresses

    Protocol

  • ARP request broadcast on Ethernet

  • Destination host ARP layer responds


Ip internet protocol
IP: Internet Protocol

  • Unreliable … connectionless datagram delivery service

  • Responsible for routing of data through intermediate networks and computers

0123

4567

1111

2345

1111

6789

2222

0123

2222

4567

2233

8901

11

8901

IP header:

1 :ICMP

6 :TCP

17 :UDP


Ip routing
IP Routing

Source

Destination

Application

Application

  • Routing Table

    Destination IP address

    IP address of a next-hop router

    Flags

    Network interface specification

Transport

Router

Transport

Network

Network

Network

Link

Link

Link


Icmp internet control message protocol
ICMP : Internet Control Message Protocol

  • Used to report problems with delivery of IP Datagrams within an IP network

  • Used by Ping, Tracerout commands

    Types and Codes

  • Echo Request (type=8, code=0)

  • Echo Reply(type=0, code=0)

  • Destination Unreachable(type=3, code=0)

  • Time Exceeded(type=11, code=0) : Time-to-Live =0

ICMP Message

20bytes

4bytes

IP

Header

ICMP

Header

ICMP

Data

Type

Code

Checksum

1byte

1byte

2bytes


Tcp transmission control protocol

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

Source Port

Destination Port

Sequence Number

Acknowledgement Number

DataOffset

-

-

-

-

Window

Checksum

Urgent Pointer

Options (0 to 10 Words of 32 Bits)

TCP Payload

TCP : Transmission Control Protocol

  • Connection-Oriented, Reliable, Byte Stream Service

    Protocol

  • Set up connection

  • Transfer data

  • Close connection

TCP Header Format


Tcp connection
TCP : Connection

Client

Host

Client

Host

Send SYN seq=x

Send FIN seq=x

Receive FIN segment

Send ACK x+1

Receive SYN segment

Send SYN seq=y,

ACK x+1

Receive ACK segment

Receive SYN

+ACK segment

Send FIN seq=y,

ACK x+1

Receive FIN

+ ACK segment

Send ACK y+1

Send ACK y+1

Receive ACK segment

Receive ACK segment

Establishing a TCP Connection

Closing a TCP Connection


Tcp data transfer
TCP : Data transfer

Client

Host

Send Packet 1

Start Timer

Packet Lost

Packet should arrive

ACK should be sent

Timer

ACK would normally

Arrive at this time

Time Expires

Retransmit Packet1

Start Timer

Receive Packet 1

Send AXK 1

Timer

Receive ACK 1

Cancel Timer


Checksum
Checksum

  • Checksum - Probably one of the oldest methods of ensuring that data is correct, checksums also provide a form of authentication because an invalid checksum suggests that the data has been compromised in some fashion. A checksum is determined in one of two ways

    • If the sum of the other bytes in the packet is 255 or less, then the checksum contains that exact value.

    • If the sum of the other bytes is more than 255, then the checksum is the remainder of the total value after it has been divided by 256.

  • Let's look at a checksum example:

    • 1,151 / 256 = 4.496 (round to 4)

    • 4 x 256 = 1,024

    • 1,151 - 1,024 = 127


CRC

  • Cyclic Redundancy Check (CRC) - CRCs are similar in concept to checksums, but they use polynomial division to determine the value of the CRC, which is usually 16 or 32 bits in length. The good thing about CRC is that it is very accurate. If a single bit is incorrect, the CRC value will not match up. Both checksum and CRC are good for preventing random errors in transmission but provide little protection from an intentional attack on your data. Symmetric- and public-key encryption techniques are much more secure.


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