1 / 80

ECE 545 Digital System Design with VHDL Lecture 6

Outline. Behavioral VHDL Coding for SynthesisCoding for Simple Finite State MachinesMoore MachineMealy MachineCoding for Algorithmic State MachinesBit-counting example. Resources. Volnei A. Pedroni, Circuit Design with VHDLChapter 8, State MachinesStephen Brown and Zvonko Vranesic, Fundamenta

markku
Download Presentation

ECE 545 Digital System Design with VHDL Lecture 6

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


    1. ECE 545—Digital System Design with VHDL Lecture 6 Behavioral VHDL Coding (for Synthesis): Finite State Machines and ASMs 9/30/08

    2. Outline Behavioral VHDL Coding for Synthesis Coding for Simple Finite State Machines Moore Machine Mealy Machine Coding for Algorithmic State Machines Bit-counting example

    3. Resources Volnei A. Pedroni, Circuit Design with VHDL Chapter 8, State Machines Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL Design, 2nd Edition Chapter 8.10 Algorithmic State Machine (ASM) Charts Chapter 10.2.6 Sort Operation (from handouts distributed in class)

    4. VHDL Design Styles (Architecture)

More Related