FP-NUMBERS & FP-MULTIPLIER. S. Rawat I.I.T. Kanpur. Floating-point representation. IEEE numbers are stored using a kind of scientific notation. ± mantissa * 2 exponent We can represent floating-point numbers with three binary fields: a sign bit s an exponent field e
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Single Precision (Single means One 32 Bit Reg to register)
Double Precision (Double means Two 32 Bit Reg to register)
(1 + f).
(1 - 2) * (1 + 0.75) * 2124-127 = (-1.75 * 2-3) = -0.21875.
Dadda Tree (24 Bits x 24 Bits)
XOR sign Bits
Adding a carry-in to the sum and subtracting 128,
which can be done by complementing the most significant bit.
FP Multiplier Block Diagram
DADDA TREE: Multiplication of 24 Bits x24 Bits (For FP-Significands).
(1) An array created of ANDing each bit of one operand with evry single bit of other operand (576 dots).Dadda Tree
Do the Reductions 96432
After 2 rows reduction ADD using 47-Bit CLA,
Note: you can instantiate CLAs written in previous labs
Result will be of 48 Bits
While feeding in Dadda tree two 24 bits operands
If (both are denormalized)
Else if (one denormalized and another normal)
MULTIPLICATION= ‘00’ or ‘01’
Else if (both normalized)
Lets Multiply 1.5x210 & 1.25x210
Stored Bias will be 10 + 127 = 137,
So 137 + 137 = 274
Stored Exponent of the result must correspond to 20 which is 147.
As in hardware what we are doing is subtracting 127 from the added exponents which were stored in FP registers i.e. 274-127 = 147