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Open Loop Gain

Open Loop Gain. Experiment 11-11. We test the Open Loop Gain of a CMOS amplifier of Example 3-1. The gain is 30. .protect .lib 'c:mm0355v.l' TT .unprotect .op .options nomod post VDD 1 0 3.3v .param W1=10u W2=10u W3=10u W4=10u M1 2 3 0 0 +nch L=0.35u W='W1' m=1 AD='0.95u*W1'

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Open Loop Gain

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  1. Open Loop Gain

  2. Experiment 11-11 • We test the Open Loop Gain of a CMOS amplifier of Example 3-1. • The gain is 30.

  3. .protect .lib 'c:\mm0355v.l' TT .unprotect .op .options nomod post VDD 1 0 3.3v .param W1=10u W2=10u W3=10u W4=10u M1 2 3 0 0 +nch L=0.35u W='W1' m=1 AD='0.95u*W1' +PD='2*(0.95u+W1)' AS='0.95u*W1' PS='2*(0.95u+W1)' M2 2 4 1 1 +pch L=0.35u +W='W2' m=1 AD='0.95u*W2' PD='2*(0.95u+W2)' +AS='0.95u*W2' PS='2*(0.95u+W2)' M3 4 4 1 1 +pch L=0.35u +W='W3' m=1 AD='0.95u*W3' PD='2*(0.95u+W3)' +AS='0.95u*W3' PS='2*(0.95u+W3)' M4 4 5 0 0 +nch L=0.35u +W='W4' m=1 AD='0.95u*W4' PD='2*(0.95u+W4)' +AS='0.95u*W4' PS='2*(0.95u+W4)' VGS1 3 6 0.7v VGS4 5 0 0.7v Vin 6 0 sin(0v 0.01v 10Meg) .tran 0.1ns 600ns .end 1 4 2 5 3 VGS4=0.7V VGS1=0.7V 6 Vin

  4. Experiment 11-12 • We test the Open Loop Gain of a CMOS amplifier of Example 4-1.

  5. Example 4.1 DIFFERENTIAL AMPLIFIER • .PROTECT • .LIB "C:\mm0355v.l" TT • .UNPROTECT • VDD VDD! 0 1.5V • VSS VSS! 0 -1.5V • MQ1 2 Vi+ 3 VSS! NCH W=10U L=2U • MQ2 Vo+ Vi- 3 VSS! NCH W=10U L=2U • MQ3 2 2 VDD! VDD! PCH W=7U L=2U • MQ4 Vo+ 2 VDD! VDD! PCH W=7U L=2U • MQ5 3 3 VSS! VSS! NCH W=100U L=2U • .OP • Vin1 Vi+ 0 AC 1 • .AC DEC 100 1 10000000k • Vin2 Vi- 0 0v • .PLOT AC VDB(Vo+) • .END

  6. Experiment 11-13 • We test the Open Loop Gain of a CMOS amplifier of Example 5-6. • The gain is 3000.

  7. Classic Two-Stage OP AMP • ********************************* • .PROTECT • .OPTION POST • .LIB 'c:\mm0355v.l' TT • .UNPROTECT • VDD VDD! 0 DC 1.5V • VSS VSS! 0 DC -1.5V • .GLOBAL VDD! VSS! • ******************************************************* • M1 1 V- 3 VSS! NCH W=10U L=2U • M2 2 V+ 3 VSS! NCH W=10U L=2U • M3 VDD! 1 1 VDD! PCH W=3U L=2U • M4 VDD! 1 2 VDD! PCH W=3U L=2U • M5 3 VB VSS! VSS! NCH W=30U L=2U • M6 6 2 VO VDD! PCH W=4U L=3U • M7 VO VB2 VSS! VSS! NCH W=14U L=2U • VBIAS5 VB 0 -0.7 • VBIAS7 VB2 0 -0.705 • ******************************************************* • Rm6 VDD! 6 0 • *VDS6 VDD! VO 0V • .OP • *** Transient Simulation *** • Vin1 V- 0 AC 1 • .AC DEC 100 1 10000000k • Vin2 V+ 0 0v • .PLOT AC VDB(Vo) • .END

  8. Experiment 11-14 • We test the Open Loop Gain of a CMOS amplifier of Example 6-20. • The gain was found to be 3000.

  9. Ex 6-20 • .protect • .lib 'c:\mm0355v.l' TT • .unprotect • .op • .options nomod post • VDD 1 0 5V • Rm2 vout vout_1 0 • Rm1 1 1_1 0 • .param W1=10u W2=20u W3=30u W4=30u • M4 3 2 1_1 1 • +pch L=1u W='W4' m=1 • +AD='0.95u*W4' PD='2*(0.95u+W4)' • +AS='0.95u*W4' PS='2*(0.95u+W4)' • M3 vout 4 3 1 • +pch L=0.5u W='W3' m=1 • +AD='0.95u*W3' PD='2*(0.95u+W3)' • +AS='0.95u*W3' PS='2*(0.95u+W3)' • M2 vout_1 6 7 0 • +nch L=0.5u W='W2' m=1 • +AD='0.95u*W2' PD='2*(0.95u+W2)' • +AS='0.95u*W2' PS='2*(0.95u+W2)' • M1 7 8 0 0 • +nch L=1u W='W1' m=1 • +AD='0.95u*W1' PD='2*(0.95u+W1)' • +AS='0.95u*W1' PS='2*(0.95u+W1)' • Vin 9 0 AC 1 • .AC DEC 100 1 1000000k • VG1 8 9 0.817V • VG2 6 0 1.8V • VG3 4 0 3V • VG4 2 0 4V • *.tf v(vout) vin • *.tran 0.1us 600us • .plot VDB(vout_1) • .end

  10. Experiment 11-15 • We test the Open Loop Gain of a CMOS amplifier of Example 6-1. • The gain was found to be 22.

  11. A typical and simple common gate amplifier is shown below:

  12. Example 6-1 • .protect • .lib 'c:\mm0355v.l' TT • .unprotect • .op • .options nomod post • VDD 1 0 3.3V • RL 1 11 100k • .param W1=5u • M1 11 2 3 0 • +nch L=0.35u W='W1' m=1 • +AD='0.95u*W1' PD='2*(0.95u+W1)' • +AS='0.95u*W1' PS='2*(0.95u+W1)' • VG 2 0 0.65v • Vin1 3 0 AC 1 • .AC DEC 100 1 10000000k • .PLOT AC VDB(11) • .END

  13. Experiment 11-16 • We test the Open Loop Gain of a CMOS amplifier of Example 6-27.

  14. The gain is about 817k.

  15. Ex 6-20 • .protect • .lib 'c:\mm0355v.l' TT • .unprotect • .op • .options nomod post • VDD 1 0 5V • Rm2 vout vout_1 0 • Rm1 1 1_1 0 • .param W1=10u W2=20u W3=30u W4=30u • M4 3 2 1_1 1 • +pch L=1u W='W4' m=1 • +AD='0.95u*W4' PD='2*(0.95u+W4)' • +AS='0.95u*W4' PS='2*(0.95u+W4)' • M3 vout 4 3 1 • +pch L=0.5u W='W3' m=1 • +AD='0.95u*W3' PD='2*(0.95u+W3)' • +AS='0.95u*W3' PS='2*(0.95u+W3)' • M2 vout_1 6 7 0 • +nch L=0.5u W='W2' m=1 • +AD='0.95u*W2' PD='2*(0.95u+W2)' • +AS='0.95u*W2' PS='2*(0.95u+W2)' • M1 7 8 0 0 • +nch L=1u W='W1' m=1 • +AD='0.95u*W1' PD='2*(0.95u+W1)' • +AS='0.95u*W1' PS='2*(0.95u+W1)' • Vin 9 0 AC 1 • .AC DEC 100 1 1000000k • VG1 8 9 0.817V • VG2 6 0 1.8V • VG3 4 0 3V • VG4 2 0 4V • *.tf v(vout) vin • *.tran 0.1us 600us • .plot VDB(vout_1) • .end

  16. Experiment 11-17 • We test the Open Loop Gain of a CMOS amplifier of Example 8-1. • The gain is found to be 42000.

  17. A High Gain Differential Amplifier M1=(10u/2u)*3 M2=(10u/2u)*3 M3 =(100u/2u)*7 M4 =(10u/2u)* M5 =(10u/2u)* M6 =(10u/2u)* M7 =(10u/2u)* M8 =(10u/2u)*3 M9 =(10u/2u)*3 M10 =(10u/2u)*3 M11 =(10u/2u)*3

  18. Test 1 • ********************************* • .PROTECT • .OPTION POST • .LIB 'c:\mm0355v.l' TT • .UNPROTECT • .op • VDD VDD! 0 1.5V • VSS VSS! 0 -1.5V • .GLOBAL VDD! VSS! • ******************************************************* • M1 5 Vi+ 6 6 PCH W=10U L=2U m=3 • M2 4 Vi- 6 6 PCH W=10U L=2U m=3 • M3 6 VB3 VDD! VDD! PCH W=100U L=2U m=7 • M4 5 VB45 VSS! VSS! NCH W=10U L=2U • M5 4 VB45 VSS! VSS! NCH W=10U L=2U • M6 3 VB67 5 VSS! NCH W=10U L=2U • M7 Vo+ VB67 4 VSS! NCH W=10U L=2U • M8 3 3 1 1 PCH W=10U L=2U m=3 • M9 Vo+ 3 2 2 PCH W=10U L=2U m=3 • M10 1 1 VDD! VDD! PCH W=10U L=2U m=3 • M11 2 1 VDD! VDD! PCH W=10U L=2U m=3 • VBIAS3 VB3 0 0.75v • VBIAS45 VB45 0 -0.737v • VBIAS67 VB67 0 0v • Vin1 Vi- 0 AC 1 • .AC DEC 100 1 10000000k • Vin2 Vi+ 0 0v • .PLOT AC VDB(Vo+) • .END

  19. Experiment 11-18 • We test the Open Loop Gain of a Inverting Integrator of Example 8-8.

  20. OP AMP • ********************************* • .PROTECT • .OPTION POST • .LIB 'c:\mm0355v.l' TT • .UNPROTECT • .op • vdd vdd! 0 1.5v • vss vss! 0 -1.5v • .global vdd! vss! • ******************************************************* • m1 5 v+ 6 6 pch w=10u l=2u m=3 • m2 4 v- 6 6 pch w=10u l=2u m=3 • m3 6 vb3 vdd! vdd! pch w=100u l=2u m=7 • m4 5 vb45 vss! vss! nch w=10u l=2u • m5 4 vb45 vss! vss! nch w=10u l=2u • m6 3 vb67 5 vss! nch w=10u l=2u • m7 vo vb67 4 vss! nch w=10u l=2u • m8 3 3 1 1 pch w=10u l=2u m=3 • m9 vo 3 2 2 pch w=10u l=2u m=3 • m10 1 1 vdd! vdd! pch w=10u l=2u m=3 • m11 2 1 vdd! vdd! pch w=10u l=2u m=3 • vbias3 vb3 0 0.75v • vbias45 vb45 0 -0.737v • vbias67 vb67 0 0v • ******************************************************* • *cload vo 0 10p • c2 vo v- 0.7n • R1 vin v- 10k • *** transient simulation *** • Vin1 vin 0 AC 1 • .AC DEC 100 1 10000000k • Vin2 Vi+ 0 0v • .PLOT AC VDB(Vo) • .END

  21. Negative Feedback on Bandwidth

  22. Experiment 11-19 • Ri=3.3kΩ, Rf=220kΩ

  23. We use the high gain amplifier whose gain is 817k. The ckt of this amplifier is as follows:

  24. Open loop • open loop test • .PROTECT • .OPTION POST • .LIB "C:\mm0355v.l" TT • .UNPROTECT • .op • VDD VDD! 0 3.3V • VSS VSS! 0 0.025V • M1 1 1 VDD! VDD! PCH W=50U L=2U • M2 2 1 VDD! VDD! PCH W=50U L=2U • M3 3 3 1 VDD! PCH W=50U L=2U • M4 4 3 2 VDD! PCH W=50U L=2U • M5 3 VB5 5 VSS! NCH W=100U L=2U • M6 4 VB6 6 VSS! NCH W=100U L=2U • M7 5 Vi- 7 VSS! NCH W=100U L=2U • M8 6 Vi+ 7 VSS! NCH W=100U L=2U • M9 7 VB9 VSS! VSS! NCH W=100U L=2U • M10 Vo 4 VDD! VDD! PCH W=150U L=2U • M11 Vo VB11 VSS! VSS! NCH W=50U L=2U • VBIAS5 VB5 0 1.9V • VBIAS6 VB6 0 1.9V • VBIAS9 VB9 0 0.6V • VBIAS1 VB11 0 1.75V • VB Vi- 0 1.65v • Vin1 11 0 AC 1 • .AC DEC 100 1 100000k • Vin2 Vi+ 11 1.65v • *Ri 12 0 3.3k • *Rf 12 Vo 220k • .PLOT AC VDB(Vo) • .END

  25. fc(ol)=1.3kHz and open loop gain is 100dB.

  26. fc(cl)=100kHz

  27. Close loop • close loop test • .PROTECT • .OPTION POST • .LIB "C:\mm0355v.l" TT • .UNPROTECT • .op • VDD VDD! 0 3.3V • VSS VSS! 0 0.025V • M1 1 1 VDD! VDD! PCH W=50U L=2U • M2 2 1 VDD! VDD! PCH W=50U L=2U • M3 3 3 1 VDD! PCH W=50U L=2U • M4 4 3 2 VDD! PCH W=50U L=2U • M5 3 VB5 5 VSS! NCH W=100U L=2U • M6 4 VB6 6 VSS! NCH W=100U L=2U • M7 5 Vi- 7 VSS! NCH W=100U L=2U • M8 6 Vi+ 7 VSS! NCH W=100U L=2U • M9 7 VB9 VSS! VSS! NCH W=100U L=2U • M10 Vo 4 VDD! VDD! PCH W=150U L=2U • M11 Vo VB11 VSS! VSS! NCH W=50U L=2U • VBIAS5 VB5 0 1.9V • VBIAS6 VB6 0 1.9V • VBIAS9 VB9 0 0.6V • VBIAS1 VB11 0 1.75V • VB Vi- 12 1.65v • Vin1 11 0 AC 1 • .AC DEC 100 1 100000k • Vin2 Vi+ 11 1.65v • Ri 12 0 3.3k • Rf 12 Vo 220k • .PLOT AC VDB(Vo) • .END

  28. Experiment 11-20 • Ri=3.3kΩ, Rf=220kΩ

  29. We use the high gain amplifier whose gain is 42k. The ckt of this amplifier is as follows: M1=(10u/2u)*3 M2=(10u/2u)*3 M3 =(100u/2u)*7 M4 =(10u/2u)* M5 =(10u/2u)* M6 =(10u/2u)* M7 =(10u/2u)* M8 =(10u/2u)*3 M9 =(10u/2u)*3 M10 =(10u/2u)*3 M11 =(10u/2u)*3

  30. fc(ol)=25kHz.

  31. Open loop • open loop • ********************************* • .PROTECT • .OPTION POST • .LIB 'c:\mm0355v.l' TT • .UNPROTECT • .op • VDD VDD! 0 1.5V • VSS VSS! 0 -1.5V • .GLOBAL VDD! VSS! • ******************************************************* • M1 5 Vi+ 6 6 PCH W=10U L=2U m=3 • M2 4 Vi- 6 6 PCH W=10U L=2U m=3 • M3 6 VB3 VDD! VDD! PCH W=100U L=2U m=7 • M4 5 VB45 VSS! VSS! NCH W=10U L=2U • M5 4 VB45 VSS! VSS! NCH W=10U L=2U • M6 3 VB67 5 VSS! NCH W=10U L=2U • M7 VO VB67 4 VSS! NCH W=10U L=2U • M8 3 3 1 1 PCH W=10U L=2U m=3 • M9 VO 3 2 2 PCH W=10U L=2U m=3 • M10 1 1 VDD! VDD! PCH W=10U L=2U m=3 • M11 2 1 VDD! VDD! PCH W=10U L=2U m=3 • VBIAS3 VB3 0 0.75v • VBIAS45 VB45 0 -0.737v • VBIAS67 VB67 0 0v • Vin1 Vi+ 0 AC 1 • .AC DEC 100 1 500000k • Vin2 Vi- 0 0v • *Ri Vi- 0 3.3k • *Rf Vi- Vo 220k • .PLOT AC VDB(Vo) • .END

  32. fc(cl)=30MHz.

  33. Close loop • close loop • ********************************* • .PROTECT • .OPTION POST • .LIB 'c:\mm0355v.l' TT • .UNPROTECT • .op • VDD VDD! 0 1.5V • VSS VSS! 0 -1.5V • .GLOBAL VDD! VSS! • ******************************************************* • M1 5 Vi+ 6 6 PCH W=10U L=2U m=3 • M2 4 Vi- 6 6 PCH W=10U L=2U m=3 • M3 6 VB3 VDD! VDD! PCH W=100U L=2U m=7 • M4 5 VB45 VSS! VSS! NCH W=10U L=2U • M5 4 VB45 VSS! VSS! NCH W=10U L=2U • M6 3 VB67 5 VSS! NCH W=10U L=2U • M7 VO VB67 4 VSS! NCH W=10U L=2U • M8 3 3 1 1 PCH W=10U L=2U m=3 • M9 VO 3 2 2 PCH W=10U L=2U m=3 • M10 1 1 VDD! VDD! PCH W=10U L=2U m=3 • M11 2 1 VDD! VDD! PCH W=10U L=2U m=3 • VBIAS3 VB3 0 0.75v • VBIAS45 VB45 0 -0.737v • VBIAS67 VB67 0 0v • Vin1 Vi+ 0 AC 1 • .AC DEC 100 1 500000k • Ri Vi- 0 3.3k • Rf Vi- Vo 220k • .PLOT AC VDB(Vo) • .END

  34. Experiment 11-21 Ri=1k Ω, Rf=47kΩ

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