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Evolutionary Heuristics for Multiobjective VLSI Netlist Bi-Partitioning. by Dr. Sadiq M. Sait Dr. Aiman El-Maleh Mr. Raslan Al Abaji Computer Engineering Department. Outline …. Introduction Problem Formulation Cost Functions Proposed Approaches Experimental results Conclusion.
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VLSI Netlist Bi-Partitioning
Key CAD Capabilities
The Challenges to sustain such an exponential growth to achieve gigascale integration have shifted in a large degree, from the process of manufacturing technologies to the design technology.
Technology 0.1 um
Transistors 200 M
Logic gates 40 M
Size 520 mm2
Clock 2 - 3.5 GHz
Chip I/O’s 4,000
Wiring levels 7 - 8
Voltage 0.9 - 1.2
Power 160 Watts
Supply current ~160 Amps
The physical design cycle consists of:
Physical Design converts a circuit description into a geometric description. This description is used to manufacture a chip.
System Level Partitioning
Board Level Partitioning
Chip Level Partitioning
path : SE1 C1C4C5SE2.
Delay = CDSE1 + CDC1+ CDC4+ CDC5+ CDSE2
CDC1 = BDC1 + LFC1 * ( Coffchip + CINPC2+ CINPC3+ CINPC4)
Pi: is any path Between 2 cells or nodes
P : set of all paths of the circuit.
The average dynamic power consumed by CMOS logic gate in a synchronous circuit is given by:
Ni : is the number of output gate transition per cycle( switching Probability)
: Is the Load Capacitance
:Load Capacitances driven by a cell before Partitioning
: additional Load due to off chip capacitance.( cut net)
Total Power dissipation of a Circuit:
: Can be assumed identical for all nets
:Set of Visible gates Driving a load outside the partition.
The Balance as constraint is expressed as follows:
However balance as a constraint is not appealing because it may prohibits lots of good moves.
Objective : |Cells(block1) – Cells( block2)|
Where Oiand Ciare lower bound and actual cost of objective “i”
i(x) is the membership of solution x in set “good ‘i’ ”
giis the relative acceptance limitfor each objective.
The above rule is translated to AND-like OWA
Represent the total Fuzzy fitness of the solution, our aim is to Maximize this fitness.
Respectively (Cutset, Power, Delay , Balance ) Fitness.
For j = 1 to Np
For i = 1 to Ng
For j = 1 to No
Population Select ( Population, offspring, Np )
For k = 1 to Np
Apply Mutation (Population[k])
ISCAS 85-89 Benchmark Circuits