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AH AL BH BL CH CL DH DL SP BP SI DI

EU. BIU. 15 8 7 0. 15 0. AX BX CX DX. AH AL BH BL CH CL DH DL SP BP SI DI F. CS SS DS ES. IP. BIU. EU. adat. BUS INTERFACE UNIT. EXECUTION UNIT. AH AL BH BL CH CL DH DL SP BP SI DI. utasítás. QUEUE. 15 8 7 0.

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AH AL BH BL CH CL DH DL SP BP SI DI

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  1. EU BIU 15 8 7 0 15 0 AX BX CX DX AHAL BHBL CHCL DHDL SP BP SI DI F CS SS DS ES IP BIU EU adat BUS INTERFACE UNIT EXECUTION UNIT AHAL BHBL CHCL DHDL SP BP SI DI utasítás QUEUE 15 8 7 0 15 0 AX BX CX DX CS SS DS ES Sínvezérlő logika Belső sín Q IP ALU F Vezérlő 6 5 4 3 2 1 IR 8086-os CPU belső felépítés Speciális regiszterek Általánoscélú regiszterek Flag-ek Szegmens regiszterek Primer akkumulátor O D I T S Z A P C Overflow Direction Interrupt Trap Signum Zero Auxiliary carry Parity Carry Bázisregiszter Stackpointer Számláló regiszter Bázispointer Szekunder akkumulátor Source index regiszter Instruction pointer Destination indexregiszter Flagregiszter ISMÉT KILÉP

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