Low Cost DAQ Implementation . Written by: Gabriel Heifets Alexander Zaprudsky Instructor: Evgeniy Kuksin. Project Goal. Build a complete multipurpose DAQ: Find the best price/performance in class components . Create schematics design. Design PCB layout and produce it.
Low Cost DAQ
Build a complete multipurpose DAQ:
Analog Input requirements:
The issue is that we want to sample +/- 10 volt with our DAQ system, but the internalMSP430 ADC is capable to handle 0~3 voltage. To achieve our goal, three possible solutions were tested.
The first solution was to interface each ADC channel to a PGA AD8250, which is capable to handle +/- 13.5 volt, and reduce it to an ADC valid voltage.
+/- 10v power source
1: No voltage translation is needed, PGA is capable to handle up to +/- 13.5 volt
2. Rin > 1Gohm
3. Cin < 0.5pF
1: One input PGA, we will have to use 8 of it’s kind, or a MUX.
2: A high BOM and volume price (AD8250 = 5$)
3: An additional power solution for the PGA’s power demands: +/-15 volts
Each ADC input is interfaced to a simple OpAmp with a constant gain with a low offset voltage. Three OpAmp were compared: OPA4188, AD8624, LTC1151
+/- 10v power source
1: BOM price is lower then in Method 1
2. Rin > 100MOhm
3. Cin < 6pF
1: One 4 inputs OpAmps, we will have to use 2 of it’s kind.
2: OpAms with a low offset voltage are expensive.
(5.88 $, 7.12$, 23.2$ accordingly)
3: An additional power solution for the OpAmps power demands: +/-10 volts
4: OpAmps have a constant gain.
An analog inputs are interfaced to an 8 inputs PGA116. The PGA’s valid voltage levels are 0~4, so a voltage dividers (implemented with low tolerance resistors and reference voltage) will be added to the PGA’s inputs.
3v – 0v
1: Low BOM price: only one PGA is needed for an 8 inputs. The PGA’s price is relatively low, PGA116 = 2.25$.
2. Supply voltage: 4V, no comprehensive power solution is needed.
3. Programmable output gain.
1: Low PGA’s inputs voltage range tolerance – additional voltage translator required.
2: Low input impedance of the complete circuit.
Analog Output requirements:
Analog voltage generation is implemented with an MCP4728 DAC. This DAC choice among the other DACs will be featured in upcoming table. To extend the output voltage range to +/-10V, an optional amplifier circuit (based on an LM2903), was added.
Depending on the parameters benefit, and it’s low cost, MCP4728 DAC was chosen.
The MCP4728 DAC voltage outputs are controlled through I2C interface. To reduce the over analog voltage outputs BOM price, the MCP4728 IC was chosen although it’s lower accuracy. To compensate this disadvantage, a feedback calibration circuit implemented.
Two calibration method were considered and BOM optimized:
1: The four voltage outputs are introduced to a four channel MUX, and the MUX output divided by a high precision resistors to accommodate MSP430 valid voltage level.
Total BOM price for this method: 0.172$+2.8$=2.872$
2: Each one of the four channels will be divided by a high precision resistors to an MSP430 valid input voltage.
Total BOM price for this method: 0.688$
During to lower BOM price, the second method was implemented in our solution.
PWM outputs are generated by MSP430, and optically isolated by an optic solid state relay VO14642AT. To drive the VO14642AT inner LED MOSFET driver was added.
A two methods were exanimated to implement the GPIOs level translation.
1: A dedicated solution by a level translators that are available on the market
2: Single MOSFET based voltage translation for an each GPIO.
During the BOM consideration, METHOD 2 was chosen.
We need accuracy of +/- 2 LSB with 12bit ADC i.e.
The accuracy of the ADC sampling depends of +/- Vref:
The MSP430F5529 has an internal Vref with accuracy of:
But in order to achieve accuracy of +/- 2 LBS the accuracy of the Vref should be at least 0.1%.
So the LM4132BMF an external Vref with accuracy of 0.1% was chosen.
In order to get +10v from +5v USB power for the optional OpAmp power supply in the Analog Outputs circuit we decided to use charge pumps instead of Boost converter to prevent possible noises and to reduce BOM price.
Because we can’t trust that the USB power is always +5v and not less, we couldn’t use only one charge pump to double it, so we needed two charge pumps with more than +5v operating voltage range. We found only one charge pump with such operating voltage range - ICL7660S
In order to supply stable power of 3.3v and 4.5v to the components we used TLV70233DBVR and
TLV70245DBV accordingly because of they relatively low price – 0.16$ for each.
PCB design software:
High noising components:
Switching components that are implements our charge pump, were placed in an isolated part of the PCB, and surrounded with a grounded shield.
High noising components:
Analog and Digital signals and Power supplies are separated one from another to prevent parasitic leakage and crosstalk to achieve a better accuracy.
USB differential 90ohm pair:
To calculate the width of the USB data traces the following equation was used:
Z=45ohm (desired impedance)
Er=4 (PCB dielectric –layer C)
H=5 (dielectric thickness between the pair layer (A) and a power plane (D) )
T= 1.4 (thickness of copper traces)
W= 9.5 The calculated traces width
High accurate components:
Free PCB areas:
All the PCB areas that are left free from the routing traces were filled with a solid ground planes to make better EMIprotection. A dozen of VIAs were added to provide better connection between the ground planes, and to make the current return path as short as possible.
All island that were created during solid planes adding where detected and cleared. One way planes and traces that are formed so called “antennas” were eliminated or grounded.
1. Firmware upgrade over USB channel (Using TI BSL feature).
2. Making traces width to match the component’s pin’s footprint width or wider – to reduce ESR.
3. Adding maximal quantity of solid ground traces to the decoupling capacitors (trace to each side of the capacitor pin’s footprint) – to reduce impedance by paralleling traces.
4. Using an arc instead of sharp angles on a trace turns to reduce signal reflections
5. Adding “tear drops” on every connector pins