Processor structure and function . Members: Zhe Geng Jorge Montenegro Carlos Garrido wAlli Butt Adrian Suarez Diego Arias . Contents . Processor Organization Register Organization User-visible registers Control and Status register Example Microprocessor Register Organizations
Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.
Processor structure and function
Carlos garrido & jorgemontenegro
Section 12.3Instruction Cycle
An instruction cycle (sometimes called fetch-and-execute cycle, fetch-decode-execute cycle, or FDX) is the basic operation cycle of a computer.
It is the process by which a computer retrieves a program instruction from its memory, determines what actions the instruction requires, and carries out those actions.
This cycle is repeated continuously by the central processing unit (CPU), from bootup to when the computer is shut down.
The instruction cycle is the time in which a single instruction is fetched from memory, decoded, and executed. THE FOUR SUB-CYCLES:
Reads the next instruction from memory into the processor.
May require memory access to fetch operands, therefore more memory accesses.
Save current instruction and service the interrupt.
Interpret the opcode and perform the indicated operation.
Decoding the instruction?
The decoder interprets what?
What is being fetched from memory?
What decision is made next?
Based on the decision what are the options?
What if decision is a direct memory operation?
What if decision is an indirect memory operation?
Adrian Suarez & Diego Arias