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EECE **** Embedded System Design

EECE **** Embedded System Design. Process networks. Many applications can be specified in the form of a set of communicating processes. Example: system with two sensors:. temperature sensor. humidity sensor. Alternating read loop read_temp; read_humi until false;

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EECE **** Embedded System Design

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  1. EECE **** Embedded System Design

  2. Process networks • Many applications can be specified in the form of a set of communicating processes.Example: system with two sensors: temperature sensor humidity sensor Alternating readloop read_temp; read_humiuntil false; of the two sensors no the right approach. mux FIFO Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  3. The case for multi-process modelingin imperative languages MODULE main; TYPE some_channel = (temperature, humidity); some_sample : RECORD value : integer; line : some_channel END; PROCESS get_temperature; VAR sample : some_sample; BEGIN LOOP sample.value := new_temperature; IF sample.value > 30 THEN .... sample.line := temperature; to_fifo(sample); END END get_temperature; PROCESS get_humidity; VAR sample : some_sample; BEGIN LOOP sample.value := new_humidity; sample.line := humidity; to_fifo(sample); END END get_humidity; BEGIN get_temperature; get_humidity; END; • Blocking calls new_temperature, new_humidity • Structure clearer than alternating checks for new values in a single process How to model dependencies between tasks/processes? Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  4. Dependences between processes/tasks Get_tem-perature main FIFO Get_humidity General discussion of process networks Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  5. Task graphs Sequence constraint • Def.: A dependence graph is a directed graph G=(V,E) in which EVV is a partial order. • If (v1, v2) E, then v1 is called an immediate predecessor of v2 and v2 is called an immediate successor of v1. • Suppose E* is the transitive closure of E.If (v1, v2) E*, then v1 is called a predecessor of v2 and v2 is called a successor of v1. Nodes are assumed to be a „program“ described in some programming language, e.g. C or Java. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  6. ] Task graphs 1. Timing information - • Task graphs may contain additional information, • for example: Timing information Arrival time deadline Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  7. Task graphs 2. I/O-information Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  8. Task graphs 3. Shared resources Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  9. Task graphs 4. Periodic schedules .. infinite task graphs Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  10. Task graphs 5. Hierarchical task graphs - Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  11. Multi-thread graphs (IMEC) • Def.: A multi-thread graph M is defined as an 11-tuple(O, E, V, D, , , , Elat, Eresp, i, av) with: • O: set of operation nodes, • E: set of control edges, • V, D : refer to the access of variables, • : is the set of input/output nodes, • : associates execution latency intervals with all threads, • Elat, Eresp, i, avare timing constraints. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  12. MTG graphs: graphical notation Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  13. Multi-thread graph (Example) Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  14. Special case: Kahn process networks: executable task graphs; Communication is assumed to be via infinitely large FIFOs Asynchronous message passing:Kahn process networks For asynchronous message passing: communication between tasks is buffered Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  15. Properties of Kahn process networks • Each node corresponds to one program/task; • communication is only via channels; • channels include FIFOs as large as needed; • one producer and one consumer; • channels transmit information within an unpredictable but finite amount of time; • each node may be either waiting for input on one of its input channels or executing; • mapping from 1 input seq. to 1 output sequence; • in general, execution times are unknown; • send operations are non-blocking, reads are blocking. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  16. Example  Model of parallel computations used in practice (e.g. at Philips). © R. Gupta (UCSD), W. Wolf (Princeton), 2003 Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  17. Asynchronous message passing:Synchronous data flow (SDF) • Asynchronous message passing=tasks do not have to wait until output is accepted. • Synchronous data flow =all tokens are consumed at the same time. SDF model allows static scheduling of token production and consumption.In the general case, buffers may be needed at edges. Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  18. Synchronous message passing:CSP • CSP (communicating sequential processes)[Hoare, 1985],rendez-vous-based communication:Example: • process A • .. • var a ... • a:=3; • c!a; -- output • end • process B • .. • var a ... • ... • c?b; -- input • end Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  19. Synchronous message passing:ADA • After Ada Lovelace (said to be the 1st female programmer). • US Department of Defense (DoD) wanted to avoid multitude of programming languages • Definition of requirements • Selection of a language from a set of competing designs (selected design based on PASCAL) ADA’95 is object-oriented extension of original ADA. Salient: task concept Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  20. Synchronous message passing:Using of tasks in ADA Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

  21. Synchronous message passing:ADA-rendez-vous • task screen_output is • entry call_ch(val:character; x, y: integer); • entry call_int(z, x, y: integer); • end screen_out; • task body screen_output is • ... • select • accept call_ch ... do .. • end call_ch; • or • accept call_int ... do .. • end call_int; • end select; Sending a message: begin screen_out.call_ch('Z',10,20); exception when tasking_error => (exception handling) end; Department of Electrical and Computer Engineering College of Engineering, Technology and Computer Science

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