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FPPA 程式架構

FPPA 程式架構. FPP4. FPP7. FPP5. FPP0. FPP2. FPP6. FPP3. FPP1. PC. PC. PC. PC. PC. PC. PC. PC. Stack Point. Stack Point. Stack Point. Stack Point. Stack Point. Stack Point. Stack Point. Stack Point. ACC. ACC. ACC. ACC. ACC. ACC. ACC. ACC. Flag. Flag. Flag. Flag.

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FPPA 程式架構

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  1. FPPA 程式架構

  2. FPP4 FPP7 FPP5 FPP0 FPP2 FPP6 FPP3 FPP1 PC PC PC PC PC PC PC PC Stack Point Stack Point Stack Point Stack Point Stack Point Stack Point Stack Point Stack Point ACC ACC ACC ACC ACC ACC ACC ACC Flag Flag Flag Flag Flag Flag Flag Flag Processor Array Organization IO Ports Register Program Memory Data Memory

  3. Program Memory Organization Address OPT ROM 000h 007h FPP Boot Entry 010h ISR Entry FPP0 FPP Units Initialization FPP0 Program Memory User Program FPP1 FPP1 Program Memory Global Subroutine Table FFEh FFFh System Use

  4. Data Memory Organization Address SRAM 000h index 100h FPP0 FPP0 Stack FPP1 FPP1 Stack 1FFh

  5. Firmware Structure of Processor Unit .romadr 0x0000 Boot: goto FPP0Boot; goto FPP1Boot; goto FPP2Boot; goto FPP3Boot; goto FPP4Boot; goto FPP5Boot; goto FPP6Boot; goto FPP7Boot; .romadr 0x0010 Interrupt: reti; FPP0Boot: //--- Initialize MCU //---Enable other FPP //--- Initialize FPP1 SP and so on … FPP0MainLoop: … goto FPP0MainLoop; FPP1Boot: //--- Initialize FPP1 SP and so on … FPP1MainLoop: … goto FPP1MainLoop; FPP2Boot: //--- Initialize FPP2 SP and so on … FPP2MainLoop: … goto FPP2MainLoop; FPP3Boot: //--- Initialize FPP3 SP and so on … FPP3MainLoop: … goto FPP3MainLoop;

  6. Boot Procedure START 32KHz ILRC oscillator Initialize the system System Clock define Initialize the I/O I/O define Initialize the shared Resources of FPPx SRAM define Enable Other FPP Performance Bandwidth Sharing Set The Stack of FPP0 Set The Stack of FPP1 Set The Stack of FPP2 FPP0 Firmware FPP1 Firmware FPP2 Firmware

  7. Boot Procedure example The example code for fpp0Boot is listed below, it’s for reference only FPP0Boot: // turn-off watchdog set0 clkmd.1; // Enable EOSC and wait for stable mov a, 0b00000000; mov eoscr, a; delay 0xFF; // Calibrate IHRC and wait for stable mov a, 0b0000_0000 ; mov ihrcrh, a; mov a, 0b1100_1010; mov ihrcrl, a; delay 0xFF ; //switch ILRC to IHRC mov a, 0b00110100; mov clkmd, a; delay 0xFF; //--- initial the I/O Pin mov a, 0xff; mov pac, a ; mov a, 0xff ; mov pa, a ; //---- Set the performance for units pmode 31; //---- Enable other Processor unit --- mov a, 0xFF ; mov fppen, a ; // Stack Pointer Setting for FPP0 mov a, 0x60 ; mov sp, a ; …

  8. Registers eoscr - Enable External OSCillator bit-0: 1=Enable XTAL Smith trigger strong mode 0=Disable XTAL Smith trigger strong mode bit-1: 1=Enable XTAL Smith trigger 0=Disable XTAL Smith trigger bit4-2: Option of driving strength in crystal oscillator bit6-5: 00=External RC oscillator 01=32KHz crystal oscillator 10=4Mhz crystal oscillator 11=20MHz crystal oscillator bit7: 1=Enable external RC oscillator or crystal oscillator 0=Disable external RC oscillator or crystal oscillator internal 32KHz need delay 30m/S external 20MHz need delay 1m/S

  9. Registers clkmd - Clock Mode Register Use External OSCillator bit-0: Reset Function/RA5 bit-1: 1=Enable Watch Dog (default) 0=Disable Watch Dog bit-2: 1=Enable Internal Low RC (default) 0=Disable Internal Low RC bit-3: No Used bit-4: 1=Enable Internal High RC (default) 0=Disable Internal High RC bit-7~5: 000=internal high RC/4 001=internal high RC/2 010=internal high RC 011=external OSC/4 100=external OSC/2 101=external OSC 110=internal low RC/4 111=internal low RC (default)

  10. Registers ihrcrh / ihrcrl - Internal high RC Calibrate Register bit-0:Internal high RC Calibrate Register High bit-0-7:Internal high RC Calibrate Register Low VDD=5V，T=25℃ H-HIHRCRL FREQ H-HIHRCRL FREQ 0_0000_0000 10.6 0_1011_1000 15.5 0_0001_0000 10.9 0_1101_0000 15.9 0_0010_0000 11.3 0_1101_1000 16.3 0_0100_0000 11.7 0_1110_0000 16.7 0_0101_0000 12.2 0_1110_1000 17.2 0_0110_0000 12.7 0_1111_0000 17.7 0_0111_0000 13.2 0_1111_1000 18.2 0_1001_0000 13.8 1_0001_0000 18.7 0_1010_0000 14.4 1_0010_0000 19.9 0_1010_1000 14.8 1_0011_0000 21.3 AP-NOTE:PDK-APN-2006004_V001.pdf

  11. Registers pmode - FPP units bandwidth sharing 80C0X/80C1X/80C2X 0 : /2、/8、/16、/16、/16、/16、/16、/16 1 : /4、/4、/8、/8、/16、/16、/16、/16 2 : /8、/8、/8、/8、/8、/8、/8、/8 3 : /2、/8、/8、/8、/8、X、X、X 4 : /4、/4、/4、/8、/8、X、X、X 5 : /16、/4、/4、/4、/16、/16、/16、X 6 : /16、/2、/8、/16、/16、/16、/16、/16 7 : /8、/2、/8、/8、/8 ICE/80C6X/82CXX 0: /2, /2 1: /2, /4, /4 2: /4, /2, /4 3: /2, /4, /8, /8 4: /4, /2, /8, /8 5: /8, /2, /4, /8 … 31: /8, /8, /8, /8, /8, /8, /8, /8

  12. 各核心跑多快 • BOOT程序的重點主要在決定各核心要跑多快。 • 1T = OSC / CLKMD / PMODE( 1T=1個指令週期 ) • 舉例來說… • eoscr = 0b11110000 ;外掛16MhzOSC • clkmd = 0b10010100 ; external OSC/2 • pmode = 2 ;八個核心都 /8 • 1T = 16/2/8 = 1Mhz  1T = 1us

  13. 程式架構參考 Project Description Pre-Processor Setting FPPA Boot/Clock Setting I/O Define Signal/Flag Control RAM Define Const Value Define MACRO Define FPPA Enable Control Define FPPA Program Counter Define STACK Define • FPPA Entry • Interrupt Service Routine Entry • FPP0Boot • FPPA Boot Setting • Clear RAM space • I/O Setting • Timer16 initial setup • Interrupt initial setup • AD initialize for PDK82CX • Variables initialize • FPP1Boot • FPP2Boot • FPP3Boot • FPP4Boot • FPP5Boot • FPP6Boot • FPP7Boot • Subroutine libraries • ROM IO、變數、常數、巨集定義 中斷程式 MCU 初始化 程式碼 副程式 OTP ROM 區

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