On a grid based interface to a special purpose hardware cluster
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On a Grid-Based Interface to a Special-Purpose Hardware Cluster Jeanne Lehrter University of Tennessee May, 2002 Presentation Outline Introduction Background Grid-Based Software Our Work Conclusions Future Work Introduction The need for grid computing SInRG research project

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On a grid based interface to a special purpose hardware cluster l.jpg

On a Grid-Based Interface to a Special-Purpose Hardware Cluster

Jeanne Lehrter

University of Tennessee

May, 2002

Presentation outline l.jpg
Presentation Outline

  • Introduction

  • Background

  • Grid-Based Software

  • Our Work

  • Conclusions

  • Future Work

Introduction l.jpg

  • The need for grid computing

  • SInRG research project

  • NetSolve middleware by ICL

  • Project Goals

Types of hardware l.jpg
Types of Hardware

  • General purpose hardware – can implement any function

  • ASICs – hardware that can implement only a specific application

  • FPGAs – reconfigurable hardware that can implement any function

Fpgas l.jpg

  • FPGAs offer reprogrammability

  • Allows optimal logic design of each function to be implemented

  • Hardware implementations offer acceleration over software implementations which are run on general purpose processors

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Grid-Based Software

  • NetSolve middleware

  • Client-server-agent model

  • Loosely-coupled heterogeneous environment

  • No root or superuser privileges are required to run any part of NetSolve

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NetSolve Agent

  • Resource broker

  • Maintains database of server characteristics and usage statistics

  • Runs on Linux and UNIX

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NetSolve Client

  • Provides access to remote resources

  • Interactive and programming interfaces

  • NetSolve tools available to client

  • Runs on Linux, UNIX, and Windows

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NetSolve Server

  • Offers resources to remote users

  • Expandable capability

  • Requires problem description file (PDF) for new functions to be added

  • Contains a source code generator that creates service functions

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Cluster for Advanced Machine Design

  • Grid service cluster (GSC) in ECE

  • Eleven SUN 220R Dual 450MHz UltraSPARC II processors running Solaris

  • Eight Pentium III PCs running Linux with Xilinx Virtex-1000 chip attached

  • A1000 RAID data storage unit

  • 1 Gbit/s Foundry switch

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Pilchard Environment for the FPGAs

  • Developed at Chinese University in Hong Kong

  • Plugs into 133MHz RAM DIMM slot and is an example of “programmable active memory”

  • Pilchard is accessed through memory read/write operations

  • Offers higher bandwidth and lower latency than other environments in which FPGA is placed in a PCI slot

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Server Software Requirements

  • NetSolve server software (and all software that is required by the NetSolve software, eg C compiler)

  • Library of functions to be offered by the server

  • PDFs that define the interfaces to these functions

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Extra Software Requirements for ECE GSC

  • Two types of functions are implemented in the ECE GSC

  • Software version - runs on the PC’s processor

  • Hardware version - runs in the FPGA

  • To implement the hardware version of the function, the software requirement of VHDL code is added

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Implementing the Hardware Function

  • The function is implemented in VHDL (or some other hardware description language)

  • The VHDL code is then “mapped” onto the FPGA through the synthesis process

  • Mapping decisions are based on constraints such as: chip area, I/O pin counts, routing resources and topologies, partitioning, resource usage minimization

Implementing the hardware function cont l.jpg
Implementing the Hardware Function Cont.

  • Synthesis process transforms the VHDL description of a function to a configuration file which is a bit stream

  • Configuration file defines how the FPGA is to be reprogrammed in order to implement the new desired functionality

  • Hardware version of a function will copy the configuration file and function parameters onto the FPGA for processing

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Server Example

  • Consider this function interface to the software implementation of the Fast Fourier Transform:

    void fft(char* inputfile, char*outputfile, int size)

  • Create a PDF that enables the NetSolve server to interface with this function by hand or by using PDF GUI generator

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Software FFT PDF


@INCLUDE </avocado/homes/lehrter/my_netfuncs/libfpga.h>

@LIB /avocado/homes/lehrter/my_netfuncs/libfpga.a



@PATH /fpga/

Software fft pdf cont l.jpg
Software FFT PDF Cont.


It performs an in-place decimation-in-frequency operation

(Sande-Tukey FFT), leaving the output shuffled. Bit

reversal is not performed.



input file


pointer to size

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Software FFT PDF Cont.



output file






fft(@[email protected], @[email protected],*@[email protected]);


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Hardware FFT

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Server Configuration File









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Client Code Example for fft

#include <stdio.h>

#include "netsolve.h"

main(int argc, char **argv)


int info, result, a;


info = netsl("fft()", argv[1], argv[2], &a);

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Client Code for fft cont.

if(info < 0)





if(info != 0)

printf("cannot solve\n");


printf("problem fft solved \n");


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Client Code for ffta

  • Client code for calling ffta is similar to fft client code except a different function is requested from NetSolve

  • info = netsl("ffta()", argv[1], argv[2], &a);

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Client Code Makefile

NETSOLVE_ROOT = /home/lehrter/NetSolve-1.4

NETSOLVE_ARCH = i686_pc_linux_gnu

CC = gcc




LIBS = -lnsl

test-fftns: test-fftns.c

$(CC) $(CFLAGS) -o [email protected] test-fftns.c $(NETSOLVECLIB) $(LIBS)

test-fftans: test-fftans.c

$(CC) $(CFLAGS) -o [email protected] test-fftans.c $(NETSOLVECLIB) $(LIBS)

Running client code l.jpg
Running Client Code

  • setenv NETSOLVE_AGENT utk1

  • test-fftns infile outfile 512

    Initializing NetSolve...

    Initializing NetSolve Complete

    Sending Input to Server utk1

    Downloading Output from Server utk1

    problem fft solved

  • test-fftans infile outfile 512

Behind the scenes of the client code l.jpg














Behind the Scenes of the Client Code





Software and

Hardware functions



Implementations l.jpg

  • Fast Fourier Transform (FFT)

  • Data Encryption Standard algorithm (DES)

  • Image Backprojection algorithm

Conclusions l.jpg

  • ECE GSC will offer hardware acceleration to general users

  • Remote users can benefit from these online resources

  • Resources are available through an efficient and easy-to-use interface

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Future Work

  • Determine how much speedup is achieved through hardware implementation of prototype functions

  • Further increase the ECE GSC capabilities

  • Find appropriate server benchmarking techniques for the ECE GSC hardware

  • Create code that detects the current configuration loaded on the FPGA