A 333MHz DRAM with Floating Body Cell (FBC). VLSI Systems I Fall 2007 Hamid Abbasalizadeh. Introduction to the Floating Body Cell (FBC) . Berkeley Started the FBC and then Toshiba continued. Intel introduced more advanced one using (two gates) front and back.
A 333MHz DRAM with Floating Body Cell (FBC)
VLSI Systems I
FBC cell only need to be restored for logic ‘1’, and it only needs to be refilled with a
few holes lost by charge pumping phenomenon every time its word line is activated.
Conventional Sense Amplifier
Introduced Symmetrical Sense Amplifier
 Hatsuda, K.; Fujita, K.; Ohsawa, T. ‘A333MHz random cycle DRAM using the floating body cell’
Custom Integrated Circuits Conference, Proceedings of the IEEE, Sept. 2005