Conversion to Larger Number of Bits

2. Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s.

3. Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. 0011 1101 0101 0010 0000 0000 0000 0000 0011 1101 0101 0010

4. Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s.

5. Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s. 1100 1110 1010 1110 1111 1111 1111 1111 1100 1110 1010 1110

6. Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s. Or, put 16 bits in the right most 16 bits and fill with the sign bit. This is called sign extension.

7. Division – Positive numbers Quotient Divisor 0010 00000111 Dividend

8. Division – Positive numbers Trial 1 Quotient Divisor 0010 00000111 Dividend or Remainder 1110 1110 < 0 Change Quotient bit to 0 and restore This must be true or the quotient would exceed 4 bits, so start with shift

9. Division – Positive numbers Trial 1 Quotient Divisor 0010 00000111 Dividend or Remainder 1110 1110 < 0 Change Quotient bit to 0 and restore, then shift and try again

10. Division – Positive numbers Trial 01 Quotient Divisor 0010 00000111 Dividend or Remainder 1110 1111 < 0 Change Quotient bit to 0 and restore, then shift and try again

11. Division – Positive numbers Trial 001 Quotient Divisor 0010 00000111 Dividend or Remainder 1110 0001 > 0 shift and use new remainder

12. Division – Positive numbers Trial 001 Quotient Divisor 0010 00000111 Dividend or Remainder 1110 00011 New Remainder

13. Division – Positive numbers Trial 0011 Quotient Divisor 0010 00000111 Dividend or Remainder 1110 00011 1110 0001 Remainder

14. Same basic hardware as Multiply Divisor 0010 0010 00000111 4 bit ALU Control Test Remainder 00000111 Shift R / L Initialize with Dividend 0111

15. 1. Shift Remainder left Divisor 0010 0010 00000111 4 bit ALU Control Test Remainder 00000111 Shift R / L Dividend 0111

16. Shift Remainder left • Subtract the Divisor Divisor 2’s complement 1110 0010 0010 00000111 1110 4 bit ALU Control Test Remainder 00001110 Shift R / L Dividend 0111

17. Shift Remainder left • Subtract the Divisor • < 0, add Divisor Divisor 1110 0010 0010 00000111 1110 1110 0010 4 bit ALU Control Test Remainder 11101110 Shift R / L Dividend 0111

18. Shift Remainder left • Subtract the Divisor • < 0, add Divisor • Shift left, Set 0 Divisor 1110 0010 0010 00000111 1110 1110 0010 0000 4 bit ALU Control Test Remainder 00001110 Shift R / L Dividend 0111

19. Subtract the Divisor Divisor 1110 0010 0 0010 00000111 1110 4 bit ALU Control Test Remainder 00011100 Shift R / L Dividend 0111

20. Subtract the Divisor • < 0, add Divisor Divisor 1110 0010 0 0010 00000111 1110 1111 0010 4 bit ALU Control Test Remainder 11111100 Shift R / L Dividend 0111

21. Subtract the Divisor • < 0, add Divisor • Shift, Set 0 Divisor 1110 0010 0 0010 00000111 1110 1111 0010 0001 4 bit ALU Control Test Remainder 00011100 Shift R / L Dividend 0111

22. Subtract the Divisor Divisor 1110 0010 00 0010 00000111 1110 4 bit ALU Control Test Remainder 00111000 Shift R / L Dividend 0111

23. Subtract the Divisor • >0, shift left, set 1 Divisor 1110 0010 00 0010 00000111 1110 0001 4 bit ALU Control Test Remainder 00011000 Shift R / L Dividend 0111

24. Subtract the Divisor Divisor 1110 0010 001 0010 00000111 1110 00011 1110 4 bit ALU Control Test Remainder 00110001 Shift R / L Dividend 0111

25. Subtract the Divisor • >0, Shift left, set 1 Divisor 1110 0010 001 0010 00000111 1110 00011 1110 0001 4 bit ALU Control Test Remainder 00010001 Shift R / L Dividend 0111

26. Subtract the Divisor • >0, Shift left, set 1 • Shift left half right Divisor 1110 0010 0011 0010 00000111 1110 00011 1110 00010 4 bit ALU Control Test Remainder 00100011 Shift R / L Dividend 0111

27. Quotient = 0011 • Remainder = 0001 Divisor 1110 0010 0011 0010 00000111 1110 00011 1110 0001 4 bit ALU Control Test Remainder 00010011 Shift R / L Dividend 0111

28. Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor

29. Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d

30. Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d If r – d < 0, Qi = 0, shift r-d and add Divisor

31. Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d If r – d < 0, Qi = 0, shift r-d and add Divisor • Algorithm for Non- restoring Division • Subtract Divisor from Remainder • If r-d > = 0, Qi = 1, shift and subtract divisor • If r-d < 0, Qi =0, shift and add divisor • 4. After n bits, if Remainder is negative, restore

32. Non –Restoring Division • Shift Remainder Register left 1 bit • Subtract the Divisor Register from the left half • of the Remainder Register Test Remainder >= 0 < 0 3b. Shift Remainder left and set bit 0 to 0 3a. Shift Remainder left and set bit 0 to 1 Yes n Repetitions ? No n Repetitions ? Yes No 4b. Add Divisor to left half of Remainder Register 4a. Subtract Divisor from left half of Remainder Register 5b. Shift left half of Remainder right one bit and add Divisor to left half of Remainder 5a. Shift left half of Reminder right one bit

33. Non –Restoring Division Divisor 0010 0010 00000111 4 bit ALU Control Test Remainder 00000111 Shift R / L Initialize with Dividend 0111

34. 1. Shift Remainder left Divisor 0010 0010 00000111 4 bit ALU Control Test Remainder 00000111 Shift R / L Dividend 0111

35. Shift Remainder left • Subtract the Divisor Divisor 2’s complement 1110 0010 0010 00000111 1110 4 bit ALU Control Test Remainder 00001110 Shift R / L Dividend 0111

36. Shift Remainder left • Subtract the Divisor • < 0, Shift left, Set 0 2’s complement Divisor 1110 0010 0010 00000111 1110 1110 4 bit ALU Control Test Remainder 11101110 Shift R / L Dividend 0111

37. Add divisor 2’s Complement Divisor 1110 0010 0 0010 00000111 1110 11101 4 bit ALU Control Test Remainder 11011110 Shift R / L Dividend 0111

38. Add divisor 2’s Complement Divisor 1110 0010 0 0010 00000111 1110 11101 0010 4 bit ALU Control Test Remainder 11011110 Shift R / L Dividend 0111

39. Add divisor • < 0, Shift left, set 0 2’s Complement Divisor 1110 0010 0 0010 00000111 1110 11101 0010 1111 4 bit ALU Control Test Remainder 11111110 Shift R / L Dividend 0111

40. Add divisor 2’s Complement Divisor 1110 0010 00 0010 00000111 1110 11101 0010 11111 0010 4 bit ALU Control Test Remainder 11111100 Shift R / L Dividend 0111

41. Add divisor • > 0, Shift left, set 1 2’s Complement Divisor 1110 0010 00 0010 00000111 1110 11101 0010 11111 0010 0001 4 bit ALU Control Test Remainder 00011100 Shift R / L Dividend 0111

42. Subtract divisor 2’s Complement Divisor 1110 0010 001 0010 00000111 1110 11101 0010 11111 0010 00011 1110 4 bit ALU Control Test Remainder 00111001 Shift R / L Dividend 0111

43. Subtract divisor • >0, Shift left, set 1 2’s Complement Divisor 1110 0010 001 0010 00000111 1110 11101 0010 11111 0010 00011 1110 0001 4 bit ALU Control Test Remainder 00011001 Shift R / L Dividend 0111

44. Subtract divisor • >0, Shift left, set 1 • Shift Left Half right 2’s Complement Divisor 1110 0010 0011 0010 00000111 1110 11101 0010 11111 0010 00011 1110 0001 4 bit ALU Control Test Remainder 00110011 Shift R / L Dividend 0111

45. Subtract divisor • >0, Shift left, set 1 • Shift Left Half right 2’s Complement Divisor 1110 0010 0011 0010 00000111 1110 11101 0010 11111 0010 00011 1110 0001 4 bit ALU Control Test Remainder 00010011 Shift R / L Dividend 0111

46. MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder divide div $s1, $s2 # Lo = $s1/$s2 = quotient # Hi = $s1 mod$s2 = remainder For signed numbers, 1. determine the sign of the quotient 2. convert to positive representation 3. divide 4. determine the sign and convert to 2’s complement if needed

47. MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder divide div $s1, $s2 # Lo = $s1/$s2 = quotient # Hi = $s1 mod$s2 = remainder divide unsigned divu $s1, $s2 # unsigned version of div

48. MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder multiply mult $s1, $s2 # Hi,Lo = $s1 x $s2 multiply unsigned multu $s1, $s2 # Hi,Lo = $s1 x $s2 ( unsigned) move from Hi mfhi $s3 # $s3 = Hi move from Lo mflo $s3 # $s3 = Lo

49. Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2k is the same as shift k to the left, 0 fill 2. Divide by 2k is the same as shift k to the right, 0 fill

50. Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2k is the same as shift k to the left, 0 fill 2. Divide by 2k is the same as shift k to the right, 0 fill For 2’s Complement Numbers It does not always work!