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PIC – ch . 2b. Move to GPR. Move [copy] contents of WREG  GPR/RAM MOVLW 99H ;WREG=99H MOVWF 0H ;move [copy] WREG contents to location 0h … Cant move literal [immediate] values directly into the general-purpose RAM locations in the PIC18. They must be moved there via WREG.

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Pic ch 2b

PIC – ch. 2b


Move to gpr
Move to GPR

  • Move [copy] contents of WREG GPR/RAM

    MOVLW 99H ;WREG=99H

    MOVWF 0H

    ;move [copy] WREG contents to location 0h

  • Cant move literal [immediate] values directly into the general-purpose RAM locations in the PIC18.

  • They must be moved there via WREG.

    Q: Can literal values directly into SFR?


Addw f
ADDWF

  • ADDLW 15H ; =15h + [WREG]

  • ADDWF fileReg, D ; =[WREG] + [fileReg]

  • Sources:

    • Content of WREG

    • fileReg: Content of file register (special or general)

  • Destination: D indicates destination bit

    • If D = 0, destination of the result is WREG, or

    • If D = 1, destination is file register


  • Or,

    • ADDWF fileReg, w ; =[WREG] + [fileReg]

      ; destination of the result is WREG

    • ADDWF fileReg, f ; =[WREG] + [fileReg]

      ; destination of the result is fileReg



    Q state the contents of file reg ram locations 12h and wreg after
    Q. State the contents of file reg. RAM locations 12H and WREG after…

    • MOVLW 0 ;WREG = 0

    • MOVWF 12H ;move WREG to location 12 to clear it

    • MOVLW 22h ;WREG=22

    • ADDWF 12h, F ;add WREG to loc 12h

    • ADDWF 12h, F ;add WREG to loc 12h

    • ADDWF 12h, F ;add WREG to loc 12h

    • ADDWF 12h, F ;add WREG to loc 12h

    • Loc 12h  22 44 66 88

    • WREG  22 22 22 22


    Q state the contents of file reg ram locations 12h and wreg after1
    Q. State the contents of file reg. RAM locations 12H and WREG after…

    • MOVLW 0 ;WREG = 0

    • MOVWF 12H ;move WREG to location 12 to clear it

    • MOVLW 22h ;WREG=22

    • ADDWF 12h, w ;add WREG to loc 12h

    • ADDWF 12h, w ;add WREG to loc 12h

    • ADDWF 12h, w ;add WREG to loc 12h

    • ADDWF 12h, w ;add WREG to loc 12h

    • Loc 12h  22 22 22 22

    • WREG  22 44 66 88


    Table 2 2 alu instructions using both wreg filereg
    Table 2.2 WREG after…ALU instructions – using both WREG & fileReg

    • ADDWF fileReg, d ; d =W / d =F default is F

    • ADDWFCfileReg, d ;… with carry

    • ANDWF - AND

    • IORWF - OR

    • XORWF - Ex-OR w with f

    • SUBFWB - subtract f from w with borrow

    • SUBWF - subtract w from f

    • SUBWFB - subtract w from f with borrow


    Table 2 3 file reg instructions using filereg or wreg as destination
    Table 2.3 WREG after…File Reg. instructions – using fileReg or WREG as destination

    • COMF fileReg, d ;-complement/invert f

    • DECF -dec f

    • DECFSZ -dec f & skip if zero

    • DECFSNZ -dec f & skip if not zero

    • INC -inc f


    • MOVF -move WREG after…fileReg

    • NEGF -negative f

    • Rotate right, rotate left

    • SWAPF -swap nipples in fileReg

    • BTG -bit toggle fileReg


    2 4 pic status flag register
    2.4 PIC Status WREG after…Flag Register

    • The STATUS register is of most importance to programming the PIC, it contains the arithmetic status of the ALU (Arithmetic Logic Unit), the RESET status and the bank select bit for data memory.

    • 8-bit register

    • Only 5 bits to use by PIC18

    • Other 3 bits – not used and read as 0


    • C – carry WREG after…

    • DC – digital carry

    • Z – zero

    • OV – overflow

    • N – negative


    C WREG after…

    • It is affected after an 8-bit addition or subtraction, for unsigned arithmetic

    • Ch. 5


    Dc digital carry auxiliary carry flag
    DC – digital carry / Auxiliary carry flag WREG after…

    • For BCD [binary coded decimal] arithmetic.

    • When there is a carry from bit-3 to bit-4 during an ADD or SUB – it is set, else, cleared.


    Z WREG after…

    • If the result is zero, then Z= 1

    • Used in arithmetic or logic ops.

    • Z for looping

    • Ch. 3


    Ov overflow flag
    OV – overflow flag WREG after…

    • OV = 1, when the result of a signed number operation is too large, causing the high-order bit to overflow into the sign bit.

    • For signed arithmetic  OV, N

    • For unsigned arithmetic  C


    N negative flag
    N – negative flag WREG after…

    • For signed no., bit-7 as the sign bit.

    • If bit-7 = 0  Z=0 result is positive

    • If bit-7 = 1  Z=1 result is negative

    • Ch. 5


    • Some instructions affect all flags WREG after…

      • E.g., ADDWL

    • Some inst. – only Z or N flag bits, or both

      • E.g., ANDWL

    • Some inst. – no flags at all!

      • E.g., all move instructions, except MOVF


    Q status of c dc z after addition of 38h and 2fh for
    Q. Status of C, DC, Z after addition of 38h and 2Fh for - WREG after…

    • MOVLW 38H

    • ADDLW 2FH

      =========

      38h  0011 1000

      2Fh  0010 1111

      -----------------------------

      67h  0110 0111 WREG = 67h



    Q? WREG after…

    • MOVLW 9Ch

    • ADDLW 64h


    • C = 1 WREG after…

    • DC = 1

    • Z= 1



    Conditional branch jump
    Conditional branch [jump] WREG after…

    InstructionsAction

    • BC branch if C = 1

    • BNC branch if C != 0

    • BZ branch if Z = 1

    • BNZ branch if Z != 0

    • BN branch if N = 1

    • BNC branch if N != 0

    • BOV branch if OV = 1

    • BNOV

      More – ch.3


    Next… WREG after…


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